Analog Devices Inc. AD7388BCPZ-RL7
- Part No.:
- AD7388BCPZ-RL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-WFQFN Exposed Pad, CSP
- Datasheet:
-
AD7388BCPZ-RL7.pdf
- Description:
- IC ADC 12BIT SAR 16LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:989
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7388BCPZ-RL7 from Analog Devices is a 12-bit, dual simultaneous sampling SAR ADC with 4-channel input via integrated 2:1 multiplexers, 4 MSPS throughput, ±0.2 LSB typical INL, and 73.8 dB SNR at 1 kHz (VREF = 2.5 V internal), designed for high-precision motor current sensing in industrial servo drives.
For engineers reviewing the AD7388BCPZ-RL7 datasheet, AD7388BCPZ-RL7 pinout, AD7388BCPZ-RL7 application, or AD7388BCPZ-RL7 equivalent, this page delivers verified specifications, validated pin functions, confirmed thermal and timing behavior across −40°C to +125°C, and real-world substitution guidance for embedded control and power quality systems.
Technical Context
The AD7388BCPZ-RL7 implements two independent SAR ADC cores with synchronized sampling on AINA0/AINA1 and AINB0/AINB1, enabling true dual-channel acquisition for in-phase/quadrature or current/voltage pair capture. Its on-chip channel sequencer supports automatic round-robin or fixed-pair selection without host intervention.
It integrates a buffered 2.5 V reference (10 ppm/°C max), oversampling block (OSR up to 8), resolution boost mode, and alert function triggered by programmable high/low thresholds - all configurable via SPI registers including CONFIGURATION1, ALERT_LOW_THRESHOLD, and ALERT_HIGH_THRESHOLD.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - delivers 1 LSB = 610 µV step size with 2.5 V reference, sufficient for 12-bit precision in closed-loop motor control feedback. |
| Throughput Rate | 4 MSPS per channel pair - enables 250 ns conversion cycle time, supporting real-time current loop updates at >1 MHz control bandwidth. |
| INL (typ) | ±0.2 LSB - ensures monotonicity and <0.005% full-scale linearity error, critical for accurate torque estimation in FOC algorithms. |
| SNR (typ) | 73.8 dB at 1 kHz - corresponds to ~12.3 effective bits, validated with internal 2.5 V reference and no oversampling. |
| Operating Temp | −40°C to +125°C - qualified for under-hood automotive inverters and industrial motor drives without derating. |
| Supply Range | VCC = 3.0–3.6 V, VLOGIC = 1.65–3.6 V - supports mixed-voltage digital interfacing (e.g., 1.8 V FPGA logic with 3.3 V analog domain). |
| Package | 16-lead 3 mm × 3 mm LFCSP - exposes thermal pad for direct GND connection, achieving θJA = 55.4°C/W in JEDEC 2S2P layout. |
Pinout & Package
AD7388BCPZ-RL7 uses a 16-lead, 3 mm × 3 mm lead frame chip scale package (LFCSP) with exposed thermal pad requiring solder connection to PCB ground plane for thermal and electrical integrity.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| GND (Pins 1, 10) | Ground reference | Dual low-impedance return paths for analog and digital domains; mandatory for noise isolation between ADC cores. |
| VLOGIC (Pin 2) | Logic interface supply | Decoupled with 1 µF capacitor; sets digital I/O voltage levels (1.65–3.6 V) independent of VCC, enabling 1.8 V FPGA compatibility. |
| REGCAP (Pin 3) | Internal regulator decoupling | Stabilizes internal 1.9 V LDO output; requires 1 µF ceramic capacitor to GND to suppress switching noise affecting reference stability. |
| VCC (Pin 4) | Analog power supply | Main 3.0–3.6 V supply for SAR core and analog front-end; 1 µF decoupling essential to limit dynamic supply droop during sampling. |
| AINB1 / AINB0 (Pins 5, 6) | ADC B analog inputs | Single-ended inputs for second channel pair; support simultaneous sampling with AINA0/AINA1 for differential signal reconstruction. |
| AINA1 / AINA0 (Pins 7, 8) | ADC A analog inputs | Primary single-ended inputs; sampled on falling edge of CS; 18 pF track-mode capacitance minimizes external driver burden. |
| REFCAP (Pin 9) | Reference decoupling | Connects to 0.1 µF capacitor for internal 2.5 V bandgap; omitted if external reference used, per REFSEL register bit setting. |
| REFIO (Pin 11) | Reference I/O | Bi-directional: outputs 2.5 V internal reference or accepts 2.49–3.4 V external source; requires 1 µF decoupling in both modes. |
| CS (Pin 12) | Chip select | Active-low initiation signal for conversion and SPI frame sync; also triggers ALERT assertion when threshold exceeded. |
| SDOA (Pin 13) | Serial data output A | Reads ADC A results, ADC B results, or register contents; tri-state controlled by CS; compatible with standard SPI read protocols. |
| SDOB/ALERT (Pin 14) | Dual-function terminal | Outputs ADC B data OR asserts active-low ALERT when conversion result breaches programmed thresholds - hardware interrupt capability. |
| SDI (Pin 15) | Serial data input | Writes to configuration, alert, and threshold registers; setup/hold times (1 ns) enable reliable operation with fast microcontrollers. |
| SCLK (Pin 16) | Serial clock input | Supports up to 25 MHz SCLK (tSCLK = 12.5 ns min); rising edge clocks data out, falling edge latches SDI - standard SPI Mode 0. |
| EPAD | Exposed thermal pad | Mandatory GND connection; provides primary thermal path and reduces junction-to-board θJB; improves long-term reliability at 125°C ambient. |
Key Features
| Feature | Design Value |
|---|---|
| Dual simultaneous sampling | Two independent SAR cores acquire AINA0/AINA1 and AINB0/AINB1 at identical timestamps - eliminates phase skew in current/voltage measurement pairs. |
| On-chip oversampling (OSR up to 8) | Rolling average mode delivers 80.5 dB SNR (6.7 ENOB) at OSR = 8, reducing post-processing load while maintaining 500 kSPS effective rate. |
| Programmable alert function | Hardware interrupt generated within 200 ns of threshold violation (tALERTS), enabling sub-microsecond fault response in safety-critical motor protection. |
| Channel sequencer mode | Automates 4-channel scan (AINA0→AINA1→AINB0→AINB1) without CPU intervention - frees MCU resources for real-time control execution. |
| Resolution boost function | Configurable mode that trades speed for enhanced linearity: maintains 12-bit accuracy while improving DNL/INL consistency across temperature. |
Applications
| Motor Control Current Sense | Power Quality Monitoring |
|---|---|
|
Use Scenario: Real-time phase current sampling in 3-phase IGBT/SiC inverter legs for field-oriented control (FOC) in servo drives. IC Role / Device Role / Timing Role: Dual simultaneous ADC captures current sense resistor voltages across two phases with matched aperture delay (<450 ps), enabling precise dq-axis current reconstruction. Use Value: ±0.2 LSB INL ensures <0.05% torque ripple at full scale; 4 MSPS rate supports >20 kHz PWM carrier synchronization with minimal latency. |
Use Scenario: Simultaneous voltage and current waveform capture in DIN-rail mounted power analyzers for harmonic distortion analysis (IEC 61000-4-7). IC Role / Device Role / Timing Role: ADC A samples line voltage (AINA0), ADC B samples neutral current (AINB0); sequencer cycles through auxiliary channels for temperature and DC bus monitoring. Use Value: 73.8 dB SNR and −111.6 dB channel-to-channel isolation prevent crosstalk-induced THD inflation; −40°C to +125°C rating enables outdoor deployment. |
| Sonar Signal Acquisition | Erbium-Doped Fiber Amplifier (EDFA) |
|
Use Scenario: Digitizing echo return signals from ultrasonic transducers in industrial tank level sensing systems operating at 40–200 kHz. IC Role / Device Role / Timing Role: High input bandwidth (22 MHz −3 dB) and low aperture jitter (20 ps) preserve time-of-flight resolution; oversampling improves SNR for weak echo detection. Use Value: Rolling average OSR = 8 raises SNR to 80.5 dB, extending usable range by ~2× compared to base rate; 12-bit resolution matches transducer dynamic range. |
Use Scenario: Closed-loop bias current control of pump lasers in fiber-optic telecom amplifiers, requiring stable, low-drift analog monitoring at elevated chassis temperatures. IC Role / Device Role / Timing Role: Measures photodiode feedback and thermistor voltage simultaneously to regulate laser diode current and TEC drive; internal 2.5 V reference drift ≤10 ppm/°C. Use Value: Gain error match (±0.01% FS) and offset error match (±0.75 LSB) ensure consistent gain scaling across dual channels, minimizing calibration overhead in production. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-sampling SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7387BCPZ-RL7 | 14-bit resolution, ±0.5 LSB INL (typ), 84 dB SNR - higher precision but lower speed margin at full throughput. | Better suited for applications needing >13 ENOB (e.g., high-fidelity audio test equipment), less optimal where 12-bit suffices and cost sensitivity is high. | Select AD7387BCPZ-RL7 only when system-level linearity requirements exceed ±0.2 LSB and budget allows 20% premium over AD7388BCPZ-RL7. |
| ADS8900BRGER | Texas Instruments 16-bit, 1 MSPS SAR ADC with 92 dB SNR, SPI interface, and integrated reference - lower throughput, higher resolution. | Targeted at portable instrumentation and data loggers where power efficiency and absolute accuracy outweigh speed needs. | Choose ADS8900BRGER for battery-powered, low-throughput applications requiring 16-bit fidelity; not suitable as drop-in replacement due to 1 MSPS vs. 4 MSPS and non-pin-compatible layout. |
Compared with AD7388BCPZ-RL7, AD7387BCPZ-RL7 offers higher resolution at the cost of increased bill-of-materials complexity and price, while ADS8900BRGER trades raw speed for superior noise performance and lower power - making AD7388BCPZ-RL7 the optimal balance for high-speed industrial control where 12-bit fidelity and thermal robustness are prioritized.
Availability
AD7388BCPZ-RL7 is available at Aetrix Electronics and suitable for motor control position feedback, power quality monitoring, and sonar signal acquisition requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AD7388BCPZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and ISO 9001-certified manufacturing.
The AD738x family targets high-speed, precision data acquisition in harsh environments - engineered specifically for industrial motor drives, energy metering, and test equipment demanding simultaneous sampling, wide temperature operation, and integrated digital features.
FAQ
What is the maximum sampling rate supported by the AD7388BCPZ-RL7?
The AD7388BCPZ-RL7 supports a maximum throughput rate of 4 MSPS for single channel pair conversion (e.g., AINA0 + AINA1), with alternating channel mode delivering 2 MSPS per channel. This is achieved using the falling edge of CS to initiate conversion, with tCYC = 250 ns minimum cycle time specified across −40°C to +125°C.
Does the AD7388BCPZ-RL7 include an internal voltage reference?
Yes, the AD7388BCPZ-RL7 integrates a buffered 2.5 V internal reference with a maximum temperature coefficient of 10 ppm/°C and 7 µV rms noise. It is accessible via the REFIO pin and requires a 0.1 µF capacitor on REFCAP; the REFSEL bit in CONFIGURATION1 register selects between internal and external reference sources.
How does the alert function operate on the AD7388BCPZ-RL7?
The AD7388BCPZ-RL7's ALERT function is implemented on Pin 14 (SDOB/ALERT). When enabled via the Alert Register, it asserts active-low within 200 ns (tALERTS) if a conversion result exceeds user-defined high or low thresholds stored in ALERT_HIGH_THRESHOLD and ALERT_LOW_THRESHOLD registers - providing hardware-triggered fault response without software polling.
What package type and thermal characteristics apply to the AD7388BCPZ-RL7?
The AD7388BCPZ-RL7 uses a 16-lead 3 mm × 3 mm LFCSP (CP-16-451) with exposed thermal pad. Its thermal resistance is θJA = 55.4°C/W (JEDEC 2S2P board) and θJC = 12.7°C/W. The exposed pad must be soldered to PCB GND for thermal integrity and EMI suppression, especially critical at 125°C ambient operation.
Can the AD7388BCPZ-RL7 perform simultaneous sampling across all four analog inputs?
No - the AD7388BCPZ-RL7 performs true simultaneous sampling only across two pairs: AINA0/AINA1 (ADC A) and AINB0/AINB1 (ADC B). All four inputs are accessed via internal 2:1 multiplexers; simultaneous capture is limited to one pair per conversion cycle, though sequencer mode enables deterministic 4-channel scanning with minimal inter-channel skew.
AD7388BCPZ-RL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 4M
- Number of Inputs:
- 4
- Input Type:
- Single Ended
- Data Interface:
- Serial
- Configuration:
- MUX-S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 3V ~ 3.6V
- Voltage - Supply, Digital:
- 1.65V ~ 3.6V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 125°C
- Supplier Device Package:
- 16-LFCSP (3x3)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7388BCPZ-RL7 FAQ
1.How can I place an order for AD7388BCPZ-RL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7388BCPZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7388BCPZ-RL7 reliable?
The price and inventory of AD7388BCPZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7388BCPZ-RL7 is usually 5 days.
3.What payment methods are accepted for AD7388BCPZ-RL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7388BCPZ-RL7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7388BCPZ-RL7?
AD7388BCPZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7388BCPZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7388BCPZ-RL7?
For technical support, including AD7388BCPZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7388BCPZ-RL7 requirements.
6.How does Aetrix verify that AD7388BCPZ-RL7 is sourced from the original manufacturer or authorized distributors?
All AD7388BCPZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7388BCPZ-RL7 meets industry standards.
7.What is the process for return or replacement of AD7388BCPZ-RL7?
All AD7388BCPZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with AD7388BCPZ-RL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7388BCPZ-RL7 part is unused and in its original packaging.
Return procedure for AD7388BCPZ-RL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7388BCPZ-RL7 Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

