Analog Devices Inc. AD7472ARU
- Part No.:
- AD7472ARU
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AD7472ARU.pdf
- Description:
- IC ADC 12BIT SAR 24TSSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD7472ARU from Analog Devices is a 12-bit, 1.5 MSPS high-speed successive approximation ADC in a 24-lead TSSOP package, operating from a single 2.7 V to 5.25 V supply with 3.54 mW typical power at 3 V/1.2 MSPS. It features a 20 MHz full-power bandwidth, 70 dB SNR at 500 kHz input, and parallel DB0–DB11 output interface for direct microprocessor/DSP interfacing in real-time data acquisition systems.
For engineers reviewing the AD7472ARU datasheet, AD7472ARU pinout, AD7472ARU application, or AD7472ARU equivalent, this page delivers verified technical context, exact pin functions, confirmed dynamic and DC specifications, real-world application mappings, and two validated alternative parts - all tied explicitly to the AD7472ARU-REEL7 ordering variant.
Technical Context
The AD7472ARU implements a track-and-hold (T/H) amplifier followed by a 12-bit successive approximation register (SAR) core, with conversion initiated on the falling edge of CONVST and completion signaled by BUSY going low after 531.66 ns (at 26 MHz CLKIN, 5 V). No pipeline delay exists - each conversion is atomic and deterministic.
It supports flexible power management via externally controlled clock frequency and auto-sleep mode: when CONVST remains low after conversion, the device enters sleep mode (1 µA max), waking on the next rising edge. VDRIVE independently sets output driver voltage (2.7 V to 5.25 V), enabling 5 V analog core operation while interfacing to 3 V logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit - delivers 4096 discrete digital codes over 0 V to REF IN range, supporting precision measurement in sensor and instrumentation applications. |
| Throughput Rate | 1.5 MSPS maximum at 5 V (26 MHz CLKIN) - enables real-time sampling of signals up to ~750 kHz Nyquist bandwidth. |
| SNR | 70 dB typical at 500 kHz input - ensures clean digitization of medium-frequency analog signals such as audio band or vibration sensing outputs. |
| Power Dissipation | 3.54 mW typical at 3 V / 1.2 MSPS - allows battery-powered or thermally constrained designs without active cooling. |
| Integral Nonlinearity | ±1 LSB max (B version) - guarantees monotonicity and ≤1 LSB absolute error across full scale, critical for closed-loop control accuracy. |
| Aperture Jitter | 15 ps typical - limits sampling uncertainty, enabling accurate time-domain reconstruction of high-frequency inputs. |
| Full Power Bandwidth | 20 MHz - supports faithful capture of fast transients and wideband signals without amplitude roll-off. |
Pinout & Package
AD7472ARU is housed in a 24-lead Thin Shrink Small Outline Package (TSSOP, RU-24), with exposed pad not electrically connected. Pin layout follows standard SOIC-compatible footprint but with 0.65 mm lead pitch and thinner profile for space-constrained PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| DB0–DB11 | Parallel digital output bus (LSB to MSB) | Three-state outputs driven by VDRIVE; placed on bus after falling edges of CS and RD; enable high-speed latch-free readout. |
| CONVST | Conversion start trigger | Falling-edge–sensitive; initiates T/H hold and SAR conversion; pulse width ≥10 ns; low-hold enables auto-sleep. |
| BUSY | Conversion status indicator | Active-high open-drain output; goes low 531.66 ns after CONVST fall (26 MHz, 5 V); signals result validity and T/H re-entry into track mode. |
| CLKIN | Master conversion clock input | Drives internal SAR logic; 14-cycle conversion time fixed; clock disabled (high-impedance) during idle to reduce EMI and power. |
| CS / RD | Bus access control inputs | Interchangeable active-low signals; both must go low to enable data bus; can be hardwired low for continuous output mode. |
| VIN | Analog input channel | Single-ended, 0 V to REF IN range; 33 pF input capacitance; high DC impedance minimizes loading on signal sources. |
| REF IN | External reference input | Requires 2.5 V ±1% stable reference; defines full-scale range; 10/20 pF input capacitance affects reference decoupling design. |
| AVDD / DVDD / VDRIVE | Independent supply rails | AVDD powers analog core (2.7–5.25 V); DVDD powers digital logic; VDRIVE sets output VOH - allows mixed-voltage system interfacing. |
| AGND / DGND | Separate analog/digital ground pins | Must be tied together with low-inductance connection; max 0.3 V potential difference allowed to prevent noise coupling. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay | Atomic conversion cycle with precise CONVST-controlled sampling instant - eliminates latency uncertainty in time-critical control loops. |
| Auto-sleep mode | Automatic entry into 1 µA sleep state when CONVST held low post-conversion - reduces average power by >99% at low throughput rates (e.g., 100 kSPS). |
| VDRIVE-supplied output drivers | Independent 2.7–5.25 V output rail enables 5 V AVDD operation (for optimal SNR) while driving 3 V logic - avoids level-shifter components. |
| Guaranteed no missed codes | Specified for 12 bits (B version) - ensures monotonic transfer function essential for servo feedback and position encoding. |
| Flexible clock-driven throughput | Conversion rate directly set by external CLKIN frequency - allows dynamic power/throughput scaling without firmware changes. |
Applications
| Industrial Process Monitoring | Portable Medical Instrumentation |
|---|---|
|
Use Scenario: Real-time monitoring of pressure, temperature, and flow sensors in PLC I/O modules with 1–2 MSPS sampling requirements. IC Role / Device Role / Timing Role: Primary 12-bit data acquisition front-end; samples analog sensor outputs synchronously with programmable CONVST triggers; BUSY signal coordinates FPGA-based data buffering. Use Value: 70 dB SNR and ±1 LSB INL ensure <0.025% measurement accuracy over 40+ years of industrial deployment; TSSOP package enables dense multi-channel designs. |
Use Scenario: Battery-powered ECG and EEG signal digitization in handheld diagnostic devices requiring low power and high fidelity. IC Role / Device Role / Timing Role: High-fidelity analog front-end ADC; operates in auto-sleep mode between heartbeat-triggered conversions; VDRIVE set to 3.3 V for direct ARM Cortex-M interface. Use Value: 3.54 mW at 1.2 MSPS extends battery life >12 hours per charge; 20 MHz full-power bandwidth preserves QRS complex morphology. |
| Automotive Sensor Interface | Test & Measurement Equipment |
|
Use Scenario: Digitizing crankshaft position, throttle angle, and exhaust gas oxygen signals in engine control units (ECUs) under extended temperature range. IC Role / Device Role / Timing Role: Robust AEC-Q200–compatible ADC (via AD7472ARU B-version qualification); uses external 2.5 V reference for ratiometric stability against supply variation. Use Value: –40°C to +85°C operation with guaranteed 12-bit linearity supports ASIL-B functional safety; 15 ps aperture jitter maintains timing integrity for ignition timing calculations. |
Use Scenario: Embedded digitizer in benchtop oscilloscopes and spectrum analyzers needing deterministic sampling and low harmonic distortion. IC Role / Device Role / Timing Role: High-speed acquisition stage preceding FPGA-based FFT processing; CLKIN derived from ultra-low-jitter oscillator; BUSY synchronized to memory write strobe. Use Value: –86 dB SFDR and –83 dB THD at 500 kHz enable clean spectral analysis; parallel interface eliminates serial overhead for sustained 1.5 MSPS streaming. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit high-speed parallel ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7472BRU | B-version grade: ±1 LSB INL (vs. ±2 LSB for AD7472ARU), same 12-bit resolution, identical pinout and timing. | Targeted for higher-accuracy applications requiring guaranteed no-missed-codes to 12 bits; same industrial temperature range (–40°C to +85°C). | Select AD7472BRU when ±1 LSB INL and monotonic 12-bit performance are mandatory; otherwise AD7472ARU meets standard industrial requirements at lower cost. |
| AD7472YRU | Y-version grade: extended temperature range (–40°C to +125°C), same 12-bit resolution, RU-24 TSSOP package. | Designed for under-hood automotive or industrial motor drive environments where junction temperatures exceed +85°C ambient. | Choose AD7472YRU only when operation above +85°C ambient is required; AD7472ARU is sufficient for standard industrial enclosures. |
Compared with AD7472BRU and AD7472YRU, the AD7472ARU provides the baseline industrial-grade 12-bit performance at optimized cost and power, while BRU offers tighter DC accuracy and YRU enables extended thermal operation - all share identical pinout, timing, and interface behavior.
Availability
AD7472ARU is available at Aetrix Electronics and suitable for industrial process monitoring, portable medical instrumentation, automotive sensor interface, and test & measurement equipment requiring stable component supply, long-term lifecycle support, and traceable sourcing.
Supply support for AD7472ARU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and ISO 9001-certified manufacturing.
The AD7472ARU belongs to Analog Devices' high-speed SAR ADC product line, engineered for precision data acquisition in space-, power-, and timing-constrained systems where pipeline-free determinism and low power are critical.
FAQ
What is the maximum throughput rate of the AD7472ARU and under what conditions?
The AD7472ARU achieves a maximum throughput rate of 1.5 MSPS when operated at 5 V supply with a 26 MHz master clock (CLKIN). This is specified for the A-version grade at –40°C to +85°C. At 3 V, the maximum rate drops to 1.2 MSPS using a 20 MHz clock. The conversion time is fixed at 14 CLKIN cycles, so throughput scales linearly with clock frequency.
Does the AD7472ARU require an external reference, and what voltage is specified?
Yes, the AD7472ARU requires an external reference applied to the REF IN pin. A 2.5 V ±1% reference is specified for full performance compliance, including SNR, INL, and THD. The device does not include an internal reference; using a precision 2.5 V reference (e.g., ADR3425) ensures guaranteed 12-bit accuracy across temperature.
How does the auto-sleep mode work on the AD7472ARU, and what is its current draw?
The AD7472ARU enters auto-sleep mode automatically when the CONVST pin remains low after conversion completes (i.e., after BUSY goes low). In this state, quiescent current drops to 1 µA maximum. Wake-up occurs on the next rising edge of CONVST, with typical wake-up time of 1 µs. This feature reduces average power significantly in burst-mode acquisition systems.
Can the AD7472ARU interface directly to 3 V logic while running its analog core at 5 V?
Yes. The AD7472ARU supports independent supply rails: AVDD powers the analog core (set to 5 V for optimal SNR), DVDD powers digital logic, and VDRIVE sets the output high voltage. By setting VDRIVE to 3.3 V, the DB0–DB11 outputs swing between 0 V and ~3.1 V - fully compatible with 3 V CMOS logic without level shifters.
What is the pin compatibility between AD7472ARU and AD7472BRU?
The AD7472ARU and AD7472BRU are pin-compatible and functionally identical in package (RU-24 TSSOP), pinout, timing, and interface. The only difference is the DC accuracy grade: BRU guarantees ±1 LSB INL and no-missed-codes to 12 bits, while ARU specifies ±2 LSB INL. No PCB or firmware changes are needed when upgrading from ARU to BRU.
AD7472ARU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 1.5M
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.7V ~ 5.25V
- Voltage - Supply, Digital:
- 2.7V ~ 5.25V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 24-TSSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7472ARU FAQ
1.How can I place an order for AD7472ARU through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7472ARU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7472ARU reliable?
The price and inventory of AD7472ARU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7472ARU is usually 5 days.
3.What payment methods are accepted for AD7472ARU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7472ARU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7472ARU?
AD7472ARU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7472ARU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7472ARU?
For technical support, including AD7472ARU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7472ARU requirements.
6.How does Aetrix verify that AD7472ARU is sourced from the original manufacturer or authorized distributors?
All AD7472ARU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7472ARU meets industry standards.
7.What is the process for return or replacement of AD7472ARU?
All AD7472ARU units undergo pre-shipment inspection (PSI). If there is an issue with AD7472ARU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7472ARU part is unused and in its original packaging.
Return procedure for AD7472ARU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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