Analog Devices Inc. AD7472YR

Overview

AD7472YR from Analog Devices is a 12-bit, 1.2 MSPS high-speed successive approximation ADC in 24-lead SOIC package, operating from 2.7 V to 5.25 V supply with external 2.5 V reference. It features 70 dB typical SNR at 500 kHz input, 14-cycle conversion time, and sleep-mode current of 2 µA - deployed in industrial motor control feedback loops requiring wide temperature operation.

For engineers reviewing the AD7472YR datasheet, AD7472YR pinout, AD7472YR application, or AD7472YR equivalent, key selection criteria include guaranteed no-missed-codes to 11 bits, –40°C to +125°C extended temperature rating, parallel DB0–DB11 interface timing, and flexible power-throughput scaling via externally applied clock (20 MHz @ 5 V / 14 MHz @ 3 V).

Technical Context

The AD7472YR implements a standard SAR architecture with track-and-hold acquisition (140 ns min), CONVST-triggered sampling on falling edge, and BUSY-driven status signaling. Conversion completes in exactly 14 CLK IN cycles, with no pipeline latency and deterministic timing - enabling precise synchronization in closed-loop control systems.

It uses separate analog (AVDD/AGND) and digital (DVDD/DGND) supplies with ≤0.3 V inter-rail tolerance, plus independent VDRIVE for output level shifting. The 2.5 V external reference defines the 0 V to REF IN unipolar input range, and all logic inputs meet TTL-compatible thresholds (VINH ≥ 2.4 V, VINL ≤ 0.4 V).

Key Specifications

Pinout & Package

AD7472YR is housed in a 24-lead small outline integrated circuit (SOIC) package with standard 0.3-inch body width and 1.27 mm lead pitch. Pin 1 is marked by a notch or dot; pins are numbered counterclockwise from top-left corner when viewed from top.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit parallel ADC applications.

Compared with AD7472ARU and ADS8320UB, the AD7472YR uniquely combines extended temperature operation (–40°C to +125°C), deterministic parallel interface timing, and guaranteed 11-bit no-missed-codes - making it irreplaceable in automotive and high-reliability industrial control.

Availability

AD7472YR is available at Aetrix Electronics and suitable for industrial motor control, automotive battery management, and high-density PLC analog input modules requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for AD7472YR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7470/AD7472 family was designed for high-speed, low-power data acquisition in space- and power-constrained embedded systems - emphasizing deterministic timing, supply flexibility, and extended temperature reliability.

FAQ

What is the maximum clock frequency supported by AD7472YR?

The AD7472YR supports up to 20 MHz CLK IN at 5 V supply and 14 MHz at 3 V supply, as specified in the Y-version electrical characteristics table. Exceeding these frequencies may cause timing violations in conversion completion and BUSY assertion, leading to invalid data reads. The 14-cycle conversion time means a 20 MHz clock yields a theoretical maximum throughput of 1.43 MSPS, though datasheet specifies 1.2 MSPS for guaranteed performance across temperature.

Does AD7472YR require an external reference voltage?

Yes, AD7472YR requires an external 2.5 V ±1% reference applied to the REF IN pin. The device does not include an internal reference. Using a precision reference such as the ADR431 or REF192 ensures full accuracy compliance - deviation beyond ±1% degrades gain error and SNR performance, especially at temperature extremes.

Can AD7472YR operate with different analog and digital supply voltages?

AD7472YR allows AVDD and DVDD to be set independently within 2.7 V to 5.25 V, but their difference must not exceed ±0.3 V at any time - including transients - to prevent latch-up or parametric shift. This constraint is explicitly stated in Absolute Maximum Ratings and must be enforced via coordinated power sequencing and tight decoupling.

What is the purpose of the VDRIVE pin on AD7472YR?

The VDRIVE pin sets the high-level output voltage (VOH = VDRIVE – 0.2 V) for the DB0–DB11 parallel data bus. It enables AD7472YR to drive 3 V logic while AVDD/DVDD operate at 5 V - preserving analog performance headroom and simplifying level-shifting in mixed-voltage systems. VDRIVE must be within 2.7 V to 5.25 V and decoupled locally.

How does the auto sleep mode function on AD7472YR?

When CONVST remains low after conversion completes, AD7472YR automatically enters sleep mode on the falling edge of BUSY, reducing IDD to 2 µA max. A rising edge on CONVST wakes the device in ≤1 µs, after which it resumes normal operation. This feature is validated for the Y version across –40°C to +125°C and enables ultra-low average power in event-triggered sampling.