Analog Devices Inc. AD7492BR-5

Overview

AD7492BR-5 from Analog Devices is a 12-bit, 1.25 MSPS successive approximation ADC with integrated 2.5 V reference and on-chip clock oscillator. It operates from a single 4.75 V to 5.25 V supply, delivers 69 dB SINAD at 500 kHz input, and features no pipeline delay for deterministic timing in real-time control loops and high-speed data acquisition systems.

For engineers reviewing the AD7492BR-5 datasheet, AD7492BR-5 pinout, AD7492BR-5 application, or AD7492BR-5 equivalent, this page provides verified technical context, validated pin functions, confirmed sleep-mode power states (full/partial), parallel interface timing constraints, and real-world application mappings - all specific to the AD7492BR-5 variant.

Technical Context

The AD7492BR-5 implements a capacitive DAC-based SAR architecture with track/hold acquisition time of 120 ns and conversion time of 680 ns, enabling true 1.25 MSPS throughput without latency artifacts. Its internal 2.5 V ±1% reference and oscillator eliminate external components while maintaining 70 dB SNR at 100 kHz input frequency.

Digital interface is decoupled via VDRIVE (2.7 V–5.25 V), allowing independent logic-level setting for DB0–DB11 outputs and CONVST/CS/RD inputs. Sleep mode selection (PS/FS pin) controls analog circuitry shutdown: partial sleep retains reference and clock (250 μA), full sleep reduces current to 1 μA.

Key Specifications

Pinout & Package

AD7492BR-5 is housed in a 24-lead SOIC package (body width 7.5 mm, JEDEC MS-013AC), with exposed pad not present. Pin functions are validated per Analog Devices Rev. A datasheet Figure 3 and Table 5.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit high-speed ADC applications.

Compared with AD7492BR-5, AD7492BRZ-5 offers identical performance in a smaller footprint but demands more aggressive thermal design, while ADS8325IPW trades speed and integration for resolution - making AD7492BR-5 the sole option meeting 1.25 MSPS, internal reference, and parallel interface requirements simultaneously.

Availability

AD7492BR-5 is available at Aetrix Electronics and suitable for industrial motor control, medical ultrasound beamforming, automotive radar signal conditioning, and laser pulse timing systems requiring stable component supply across extended production lifecycles.

Supply support for AD7492BR-5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7492 product line targets high-speed, low-power data acquisition in space- and power-constrained systems, emphasizing integration (internal REF/CLK), deterministic timing (no pipeline), and flexible I/O (VDRIVE).

FAQ

What is the maximum sampling rate supported by the AD7492BR-5?

The AD7492BR-5 supports a maximum throughput rate of 1.25 MSPS, achieved through a 680 ns conversion time and 120 ns track/hold acquisition time. This rate is guaranteed across the full operating temperature range (−40°C to +85°C) and supply voltage range (4.75 V to 5.25 V). The AD7492BR-5 achieves this without pipeline delay, ensuring each sample corresponds to a single, unambiguous conversion cycle.

Does the AD7492BR-5 require an external reference voltage?

No, the AD7492BR-5 includes a precision 2.5 V ±1% internal reference that is available at the REF OUT pin. This reference can be used directly for the ADC's conversion or supplied to external circuitry. An external reference is optional and only needed if a different reference voltage or tighter tolerance is required - the AD7492BR-5 operates fully functional with its internal reference enabled.

How does the PS/FS pin affect power consumption in the AD7492BR-5?

The PS/FS pin on the AD7492BR-5 selects between two hardware-defined sleep modes: tying it high enables partial sleep (250 μA max), where the internal reference and clock remain active; tying it low enables full sleep (1 μA max), where all analog circuitry is powered down. Both modes are entered automatically when CONVST remains low after conversion completion - the AD7492BR-5 uses this pin to optimize power without software overhead.

Can the AD7492BR-5 interface directly with a 3.3 V microcontroller?

Yes, the AD7492BR-5 supports direct interfacing with 3.3 V logic via its VDRIVE pin. By applying 3.3 V to VDRIVE, the DB0–DB11 outputs swing between 0 V and ~3.1 V, and the CONVST/CS/RD inputs recognize thresholds at 3.3 V × 0.3 = 0.99 V (low) and 3.3 V × 0.7 = 2.31 V (high). This allows seamless connection to 3.3 V MCUs while AVDD and DVDD operate at 5 V to maximize ADC dynamic performance.

What is the purpose of separate AGND and DGND pins on the AD7492BR-5?

The AD7492BR-5 uses separate AGND and DGND pins to isolate analog and digital return currents, minimizing noise coupling into the sensitive analog front-end. These grounds must be connected at a single point on the PCB with <0.3 V potential difference - a requirement enforced by the absolute maximum ratings. Proper separation preserves the 70 dB SNR and prevents digital switching noise from degrading conversion accuracy in the AD7492BR-5.