Analog Devices Inc. AD7575JP

Overview

AD7575JP from Analog Devices is an 8-bit successive approximation analog-to-digital converter (ADC) with integrated track-and-hold, single +5 V supply operation, 5 µs conversion time, ±1 LSB total unadjusted error, and 0 to +70°C temperature range. It digitizes full-scale signals up to 50 kHz in microprocessor-based data acquisition systems.

For engineers reviewing the AD7575JP datasheet, AD7575JP pinout, AD7575JP application, or AD7575JP equivalent, this page delivers verified technical context, real-world interface timing constraints, package-specific terminal mapping, and validated alternative options for industrial embedded and test equipment designs.

Technical Context

The AD7575JP implements a SAR architecture with on-chip track-and-hold, using a 4 MHz external clock or internal RCLK/CCLK oscillator to complete conversion in exactly 20 input clock cycles (5 µs minimum). Its sampled-data comparator settles within 7 ns due to 500 Ω switch resistance and 2 pF input capacitance.

Control logic accepts standard CS/RD microprocessor signals to initiate conversion and latch output data; BUSY indicates conversion status; TP must be hard-wired HIGH. The device supports both Slow Memory (WAIT-state) and ROM-style (two-read) interfaces with 100 ns data access time and 10 ns data hold time.

Key Specifications

Pinout & Package

AD7575JP is supplied in a 20-terminal plastic leaded chip carrier (PLCC) package (P-20A), with pin 1 identifier and two NC (no-connect) terminals. Pin functions are electrically validated per Analog Devices Rev. B datasheet.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 8-bit ADC applications.

Compared with MAX160BCNG+ and ADS7822U, the AD7575JP uniquely combines on-chip track-and-hold, parallel 8-bit interface, and 5 µs conversion in a single +5 V supply - making it optimal for legacy microprocessor systems needing robust wideband sampling without external analog support components.

Availability

AD7575JP is available at Aetrix Electronics and suitable for data acquisition systems, industrial process monitoring, test equipment, and embedded audio signal capture requiring stable component supply across extended production lifecycles.

Supply support for AD7575JP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.

The AD7575JP belongs to Analog Devices' LC2MOS precision data conversion product line, designed specifically for microprocessor-centric industrial and instrumentation applications demanding low power, single-supply operation, and easy digital interfacing.

FAQ

What is the maximum analog input frequency supported by the AD7575JP without aliasing or accuracy loss?

The AD7575JP supports full-power analog input signals up to 50 kHz - corresponding to a 2.46 V_PP sine wave with 386 mV/µs slew rate. This is enabled by its integrated track-and-hold circuit. For accurate digitization, the Nyquist criterion requires sampling ≥100 kSPS; the AD7575JP's 5 µs conversion time achieves 200 kSPS, ensuring sufficient margin. Performance remains within ±1 LSB total unadjusted error across this bandwidth.

Can the AD7575JP operate without an external clock source?

Yes, the AD7575JP can operate using its internal clock oscillator, configured with an external 100 kΩ resistor (RCLK) and 100 pF capacitor (CCLK). This generates a nominal ~4 MHz internal clock, yielding ~5 µs conversion time at +25°C. However, due to ±50% unit-to-unit variation and temperature drift, Analog Devices recommends an external 4 MHz clock for applications requiring guaranteed 5 µs timing or deterministic software timing loops.

What is the correct configuration for the TP pin on the AD7575JP?

The TP (Test Pin) on the AD7575JP must be hard-wired to a logic HIGH level (e.g., tied to VDD through a 10 kΩ pull-up resistor). It is not intended for signal routing or PCB feedthrough. Leaving TP floating or pulling it LOW will cause undefined operation, including incorrect conversion results or BUSY timing anomalies. This requirement applies universally across all AD7575JP units and operating conditions.

How does the AD7575JP interface with an 8085A-2 microprocessor in Slow Memory mode?

In Slow Memory mode, the AD7575JP connects to the 8085A-2 using CS and RD tied to the processor's IO/M̅ and RD̅ lines, with BUSY driving the READY input. A conversion starts on a memory READ instruction, forcing the 8085A-2 into WAIT until BUSY goes HIGH. Data appears on DB7–DB0 within 100 ns after RD goes HIGH. This single-instruction sequence eliminates software polling and ensures deterministic timing aligned to the processor's wait-state architecture.

Is the AD7575JP compatible with bipolar input signals?

Yes, the AD7575JP supports bipolar operation via external resistor networks (e.g., Figure 17 in the datasheet), producing offset-binary output codes for ±5 V input ranges. The AIN pin still sees only 0 to +2.46 V, so level-shifting and scaling are handled externally. Bipolar mode increases LSB size to 39.06 mV and requires 0.1% resistors for specified accuracy; calibration of offset and full-scale is recommended unless system tolerances permit ±1 LSB unadjusted error.