Analog Devices Inc. AD7626BCPZ-RL7
- Part No.:
- AD7626BCPZ-RL7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 32-WFQFN Exposed Pad, CSP
- Datasheet:
-
AD7626BCPZ-RL7.pdf
- Description:
- IC ADC 16BIT SAR 32LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:2,657
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7626BCPZ-RL7 from Analog Devices is a 16-bit, 10 MSPS charge redistribution SAR analog-to-digital converter with differential antiphase inputs, ±4.096 V input range, 91.5 dB SNR, and LVDS serial interface - designed for high-speed, high-dynamic-range data acquisition in digital X-ray and MRI systems.
For engineers reviewing the AD7626BCPZ-RL7 datasheet, AD7626BCPZ-RL7 pinout, AD7626BCPZ-RL7 application, or AD7626BCPZ-RL7 equivalent, this page delivers verified specifications, validated pin functions, real-world use cases, and confirmed alternative options - all grounded in the Rev. D datasheet and Analog Devices' official technical documentation.
Technical Context
The AD7626BCPZ-RL7 implements a true differential antiphase SAR architecture with no pipeline latency, enabling deterministic timing and zero-cycle delay between sampling and result availability. Its internal 4.096 V buffered reference and dual-mode LVDS interface (self-clocked or echoed clock) support noise-immune, high-throughput digital interfacing at up to 300 MHz clock rates.
It features three reference configurations - internal 4.096 V, external 1.2 V buffered to 4.096 V via REFIN, or direct external 4.096 V - each with defined power dissipation impact (136 mW typical with external reference at 10 MSPS). Input common-mode is fixed at VREF/2 (2.048 V), and CMRR is specified at 68 dB at 1 MHz.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes - guarantees monotonicity and full code coverage across full temperature range (−40°C to +85°C). |
| Throughput Rate | 10 MSPS maximum - supports single-shot or continuous conversion with 100 ns minimum cycle time. |
| SNR | 91.5 dB typical at 20 kHz - enables >15-bit effective resolution in medium-bandwidth applications like spectrum analysis. |
| Differential Input Range | ±4.096 V - matches standard precision reference rails and simplifies front-end amplifier design for bipolar signals. |
| INL / DNL | ±0.45 LSB / ±0.35 LSB - ensures high linearity for measurement-critical applications such as medical imaging calibration. |
| Power Dissipation | 136 mW at 10 MSPS with external reference - balances speed and thermal load in compact PCB layouts. |
| Interface | LVDS serial output (D+, D−) with self-clocked or echoed clock mode - eliminates need for external FIFO or parallel bus routing. |
Pinout & Package
AD7626BCPZ-RL7 is housed in a 32-lead, 5 mm × 5 mm LFCSP package with exposed pad (CP-32-7), rated for −40°C to +85°C operation. The exposed pad must be soldered to PCB ground plane using multiple vias per Analog Devices layout guidelines.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VDD1 (Pins 1, 19, 20) | Analog 5 V supply | Primary analog rail; requires local 100 nF decoupling; ferrite bead isolation recommended between Pin 1 and Pins 19/20. |
| VDD2 (Pins 2, 7, 18) | Analog/digital 2.5 V supply | Shared analog and digital supply; decoupled individually; trace order matters - supply Pin 2 first, then Pins 7 and 18. |
| IN+, IN− (Pins 23, 22) | Differential analog inputs | Antiphase-swing inputs referenced to VCM (2.048 V); require matched layout and 180° phase alignment for optimal CMRR. |
| CNV+, CNV− (Pins 9, 8) | Conversion control | Differential LVDS or CMOS (with CNV− grounded); rising edge initiates sampling - defines precise aperture point. |
| D+, D− (Pins 11, 10) | LVDS serial data outputs | Output 16-bit twos-complement data; self-clocked mode includes 2-bit sync header (10); echoed mode mirrors CLK± timing. |
| CLK+, CLK− (Pins 17, 16) | LVDS clock inputs | Drive data shift-out on falling edge; max frequency 300 MHz; used only in echoed clock mode. |
| DCO+, DCO− (Pins 15, 14) | LVDS clock outputs | Self-clocked mode: DCO+ grounded; echoed mode: DCO± replicates CLK± - determines host capture timing strategy. |
| REF (Pins 29, 30, 32) | Buffered reference voltage | Outputs 4.096 V when internal or 1.2 V reference active; externally driven REF disables internal buffer; all three pins tied together with 10 μF low-ESR cap to GND. |
| VCM (Pin 21) | Common-mode output | Provides stable 2.048 V (VREF/2) for driving input amplifier common-mode - reduces external bias network complexity. |
| EN0, EN1 (Pins 6, 5) | Reference/power mode select | 2-bit logic control: (1,1)=internal ref; (1,0)=external 4.096 V; (0,1)=external 1.2 V; (0,0)=power-down (sub-µW). |
Key Features
| Feature | Design Value |
|---|---|
| No latency SAR architecture | Zero pipeline delay ensures deterministic conversion timing - critical for real-time closed-loop control and time-of-flight measurements. |
| Dual LVDS interface modes | Self-clocked mode eliminates external clock routing; echoed clock mode enables synchronous capture with FPGA/ASIC clock domains. |
| Three reference options | Internal 4.096 V, external 1.2 V buffered, or direct 4.096 V - allows trade-off between system BOM count, accuracy, and power. |
| 16-bit no missing codes | Guaranteed monotonic transfer function over full temperature and supply range - essential for metrology and calibration systems. |
| High CMRR (68 dB @ 1 MHz) | Maintains signal integrity in noisy environments (e.g., MRI gradient switching) by rejecting common-mode interference on differential inputs. |
Applications
| Digital X-ray Imaging | Digital MRI Signal Chain |
|---|---|
|
Use Scenario: Digitizing fast-rising, low-noise analog outputs from flat-panel X-ray detectors during pulsed exposure. IC Role / Device Role / Timing Role: Primary high-speed ADC capturing 10 MSPS image frames with <1.5 ns aperture jitter to preserve spatial resolution. Use Value: 91.5 dB SNR and ±0.45 LSB INL enable accurate grayscale reconstruction of bone/tissue contrast without post-calibration interpolation. |
Use Scenario: Sampling RF receive chain outputs in 3T MRI systems where wide dynamic range and low distortion are mandatory. IC Role / Device Role / Timing Role: Final-stage digitizer in quadrature demodulated baseband path, synchronized to system clock via echoed LVDS mode. Use Value: 105 dB SFDR and −102.5 dB THD at 100 kHz allow detection of weak NMR signals buried under strong carrier leakage. |
| High-Speed Test Equipment | Spectrum Analysis Front-End |
|
Use Scenario: Embedded digitizer in modular PXI oscilloscopes requiring deterministic trigger-to-data latency and minimal dead time. IC Role / Device Role / Timing Role: Core ADC with no pipeline delay - enables immediate post-trigger readout and seamless multi-segment acquisition. Use Value: 100 ns tCYC and 40 ns tACQ support sub-100 ns inter-sample intervals while maintaining 16-bit fidelity for waveform fidelity validation. |
Use Scenario: Real-time FFT engine input stage in portable spectrum analyzers covering DC–2.4 MHz with >90 dB dynamic range. IC Role / Device Role / Timing Role: High-linearity ADC feeding FPGA-based windowing and FFT IP - relies on consistent 16-bit code distribution. Use Value: Histogram standard deviation of 0.48 LSB (Fig. 22) confirms low quantization uncertainty, directly improving amplitude accuracy in spectral bins. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7960BCPZ-RL7 | 18-bit, 5 MSPS, same LFCSP-32 package; uses capacitive DAC architecture with higher resolution but lower throughput. | Better suited for static/low-speed precision metrology (e.g., automated test fixtures), not real-time imaging. | Select AD7960BCPZ-RL7 when resolution > speed; AD7626BCPZ-RL7 when 10 MSPS timing determinism is required. |
| AD7623BCPZ-RL7 | 16-bit, 5 MSPS, identical architecture and pinout; lower power (95 mW at 5 MSPS) and reduced SNR (90 dB). | Valid drop-in replacement for cost-sensitive or thermally constrained designs where 5 MSPS suffices. | AD7623BCPZ-RL7 offers same layout compatibility with relaxed speed/power trade-off - ideal for legacy system upgrades. |
Compared with AD7960BCPZ-RL7 and AD7623BCPZ-RL7, the AD7626BCPZ-RL7 uniquely delivers 16-bit fidelity at 10 MSPS with zero latency - making it the only option among the three for time-critical, high-throughput acquisition where both speed and deterministic timing are non-negotiable.
Availability
AD7626BCPZ-RL7 is available at Aetrix Electronics and suitable for digital imaging systems, MRI signal chains, and high-speed test equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for AD7626BCPZ-RL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with engineering expertise spanning precision conversion, signal conditioning, and RF technologies.
The AD7626BCPZ-RL7 belongs to Analog Devices' PulSAR® family of high-speed SAR ADCs - engineered specifically for applications demanding simultaneous high resolution, high throughput, and zero-latency operation in medical, test, and communications infrastructure.
FAQ
What is the maximum sample rate supported by the AD7626BCPZ-RL7?
The AD7626BCPZ-RL7 supports a maximum throughput rate of 10 MSPS, corresponding to a minimum conversion cycle time of 100 ns. This is achievable across the full operating temperature range (−40°C to +85°C) when powered with VDD1 = 5 V, VDD2 = 2.5 V, and VIO = 2.5 V, and using either internal or external reference configuration as specified in the Rev. D datasheet.
Does the AD7626BCPZ-RL7 require an external reference voltage?
No - the AD7626BCPZ-RL7 includes an internal 4.096 V buffered reference and can operate autonomously. It also supports two external reference modes: 1.2 V applied to REFIN (buffered internally to 4.096 V), or direct 4.096 V applied to the REF pins. Reference selection is controlled by EN0/EN1 logic pins, and all modes are fully characterized in the datasheet.
What interface options does the AD7626BCPZ-RL7 provide for digital output?
The AD7626BCPZ-RL7 provides a low-voltage differential signaling (LVDS) serial interface with two operational modes: self-clocked (DCO+ grounded) and echoed clock (DCO± mirrors CLK±). Both modes output 16-bit twos-complement data; self-clocked includes a 2-bit sync header (10), while echoed mode aligns data edges to DCO+ rising edge for FPGA/ASIC capture.
Can the AD7626BCPZ-RL7 be used with single-ended input signals?
No - the AD7626BCPZ-RL7 is strictly a true differential antiphase-input ADC. Its IN+ and IN− pins must be driven with complementary 180° out-of-phase signals centered at VCM (2.048 V). Single-ended drive violates the common-mode input range specification and degrades CMRR, INL, and SNR performance as confirmed in the "Analog Inputs" section of the datasheet.
What is the power dissipation of the AD7626BCPZ-RL7 at 10 MSPS with external reference?
With external 4.096 V reference applied and operating at 10 MSPS, the AD7626BCPZ-RL7 dissipates 136 mW typical (160 mW max), broken down as ~8.8 mA from VDD1 (5 V), ~28 mA from VDD2 (2.5 V), and ~18.5 mA from VIO (2.5 V) in echoed clock mode - values explicitly listed in Table 2 of the Rev. D datasheet.
AD7626BCPZ-RL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PulSAR®
- Package/Case:
- 32-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 10M
- Number of Inputs:
- 1
- Input Type:
- Differential
- Data Interface:
- LVDS - Serial
- Configuration:
- ADC
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 2.37V ~ 2.63V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 32-LFCSP-WQ (5x5)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7626BCPZ-RL7 FAQ
1.How can I place an order for AD7626BCPZ-RL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7626BCPZ-RL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7626BCPZ-RL7 reliable?
The price and inventory of AD7626BCPZ-RL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7626BCPZ-RL7 is usually 5 days.
3.What payment methods are accepted for AD7626BCPZ-RL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7626BCPZ-RL7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7626BCPZ-RL7?
AD7626BCPZ-RL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7626BCPZ-RL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7626BCPZ-RL7?
For technical support, including AD7626BCPZ-RL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7626BCPZ-RL7 requirements.
6.How does Aetrix verify that AD7626BCPZ-RL7 is sourced from the original manufacturer or authorized distributors?
All AD7626BCPZ-RL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7626BCPZ-RL7 meets industry standards.
7.What is the process for return or replacement of AD7626BCPZ-RL7?
All AD7626BCPZ-RL7 units undergo pre-shipment inspection (PSI). If there is an issue with AD7626BCPZ-RL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7626BCPZ-RL7 part is unused and in its original packaging.
Return procedure for AD7626BCPZ-RL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7626BCPZ-RL7 Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

