Analog Devices Inc. AD7656ABSTZ

Overview

AD7656ABSTZ from Analog Devices is a 6-channel, simultaneous-sampling, 16-bit SAR ADC with true bipolar ±10 V/±5 V input ranges, 250 kSPS throughput, on-chip 2.5 V reference, and iCMOS® process technology-designed for high-accuracy power line monitoring and multi-axis industrial control systems.

For engineers reviewing the AD7656ABSTZ datasheet, AD7656ABSTZ pinout, AD7656ABSTZ application, or AD7656ABSTZ equivalent, key selection considerations include simultaneous sampling of six independent analog inputs, hardware/software-selectable input ranges, parallel/serial/daisy-chain interface modes, and ±4 × VREF (±10 V) or ±2 × VREF (±5 V) operation with 86.5 dB SNR at 50 kHz.

Technical Context

The AD7656ABSTZ integrates six independent 16-bit successive approximation register (SAR) ADCs on a single iCMOS® die, enabling true simultaneous sampling via three dedicated CONVST pins (A/B/C), each controlling a pair of channels (V1–V2, V3–V4, V5–V6). Its track-and-hold bandwidth is 12 MHz, supporting full-power input frequencies up to 100 kHz with −100 dB channel-to-channel isolation.

It supports dual interface architectures: high-speed parallel (16-bit data bus, RD/WR/CS control) and configurable serial (SPI/QSPI/MICROWIRE/DSP-compatible, daisy-chain capable with DCEN/SEL A–C pins), all operating with VDRIVE from 2.7 V to 5.25 V and independent analog supplies (VDD/VSS = ±6 V to ±16.5 V).

Key Specifications

Pinout & Package

AD7656ABSTZ is housed in a 64-lead LQFP package (10 mm × 10 mm, 0.5 mm pitch) with separate analog (AGND) and digital (DGND) ground planes, dual supply domains (VDD/VSS for analog front-end, AVCC/DVCC/VDRIVE for logic and core), and dedicated decoupling pins (REFCAPA/B/C, multiple AVCC/AGND pairs).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 6-channel simultaneous-sampling ADC applications.

Compared with AD7656BSTZ, AD7656ABSTZ delivers 2 dB higher SNR and superior channel matching for phase-critical measurements; compared with AD7606C-18, it provides guaranteed simultaneous sampling and parallel interface support-making it optimal for real-time industrial control where timing determinism outweighs raw resolution.

Availability

AD7656ABSTZ is available at Aetrix Electronics and suitable for power line monitoring systems, industrial motor control platforms, and multi-axis motion controllers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for AD7656ABSTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D and manufacturing facilities worldwide.

The AD7656A product line was developed to address demanding industrial data acquisition requirements-specifically simultaneous sampling, high SNR, bipolar input capability, and robust operation in electrically noisy environments-targeting power infrastructure, automation, and precision test equipment.

FAQ

What is the maximum sampling rate supported by the AD7656ABSTZ?

The AD7656ABSTZ supports a maximum throughput rate of 250 kSPS per channel with true simultaneous sampling across all six inputs. This is achieved using an internal oscillator and fixed 3.1 µs conversion time, independent of interface mode (parallel or serial). The device maintains this rate under full-spec conditions: VDD/VSS = ±16.5 V, AVCC/DVCC = 5.25 V, TA = −40°C to +85°C, and with the on-chip reference enabled. At this rate, AD7656ABSTZ delivers 86.5 dB SNR at 50 kHz input frequency.

Does the AD7656ABSTZ require an external reference voltage?

No, the AD7656ABSTZ does not require an external reference voltage-it includes a precision on-chip 2.5 V reference (2.49 V to 2.51 V, 25 ppm/°C TC) that can be enabled via the WR/REFEN/DIS pin (in hardware mode) or control register (in software mode). When enabled, the reference is available on the REFIN/REFOUT pin and must be decoupled with ≥10 µF capacitance. An external reference (2.5 V to 3.0 V) may be used instead by disabling the internal reference, but AD7656ABSTZ operates fully functional with the internal reference alone.

How does the AD7656ABSTZ achieve simultaneous sampling across six channels?

The AD7656ABSTZ achieves true simultaneous sampling using three dedicated CONVST inputs (CONVST A, B, C), each controlling a pair of ADCs: CONVST A triggers V1 and V2, CONVST B triggers V3 and V4, and CONVST C triggers V5 and V6. A rising edge on any CONVST pin initiates track-to-hold transition and conversion start for its assigned pair with ≤4 ns aperture delay matching between channels in the pair-and ≤10 ns matching across all six channels. This architecture ensures zero inter-channel skew, unlike multiplexed or interleaved ADCs.

Can the AD7656ABSTZ operate with different analog and digital supply voltages?

Yes, the AD7656ABSTZ supports independent supply domains: analog section uses VDD (+6 V to +16.5 V) and VSS (−6 V to −16.5 V); analog core uses AVCC (4.75 V to 5.25 V); digital core uses DVCC (4.75 V to 5.25 V); and interface logic uses VDRIVE (2.7 V to 5.25 V). AGND and DGND must be held within ±0.3 V of each other. Power supply sequencing is critical: VDD and VSS must be applied simultaneously; if not possible, VDD must ramp before VSS. AD7656ABSTZ includes improved PSS robustness over earlier revisions to tolerate minor sequencing deviations.

What interface modes does the AD7656ABSTZ support, and how are they selected?

The AD7656ABSTZ supports three interface modes selected by the SER/PAR/SEL pin: parallel (SER/PAR/SEL = 0), serial (SER/PAR/SEL = 1), and daisy-chain serial (SER/PAR/SEL = 1 + DCEN = 1). In parallel mode, DB0–DB15 carry 16-bit data with RD/WR/CS handshaking. In serial mode, DB8–DB10 become DOUT A–C outputs, and DB0–DB2 act as DOUT select lines. Daisy-chain mode enables cascading multiple AD7656ABSTZ devices on one SPI bus using DB5–DB3 as DCIN A–C inputs-allowing scalable channel expansion without additional chip selects.