Analog Devices Inc. AD7665ACP
- Part No.:
- AD7665ACP
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 48-VFQFN Exposed Pad, CSP
- Datasheet:
-
AD7665ACP.pdf
- Description:
- IC ADC 16BIT CMOS 5V 48-LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:538
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7665ACP from Analog Devices is a 16-bit, 570 kSPS charge redistribution SAR analog-to-digital converter operating from a single 5 V supply. It delivers ±2.5 LSB INL, 90 dB SNR at 180 kHz, and supports bipolar (±10 V, ±5 V, ±2.5 V) and unipolar (0–10 V, 0–5 V, 0–2.5 V) input ranges. It serves as the high-speed precision front-end ADC in data acquisition systems requiring no pipeline delay and simultaneous channel sampling.
For engineers reviewing the AD7665ACP datasheet, AD7665ACP pinout, AD7665ACP application, or AD7665ACP equivalent, key selection considerations include Warp/Normal/Impulse mode trade-offs, 48-lead LQFP vs. LFCSP package compatibility, 570 kSPS throughput with 1.75 µs conversion cycle, and dual serial (SPI/QSPI/MICROWIRE/DSP-compatible) and parallel (8-/16-bit) interface flexibility.
Technical Context
The AD7665ACP implements a charge redistribution SAR architecture with an integrated resistor-based input scaler enabling programmable analog input ranges without external components. Its internal conversion clock, factory-calibrated error correction circuitry, and dual-mode control logic support three distinct operational modes: Warp (570 kSPS, minimum inter-conversion interval), Normal (500 kSPS, full accuracy independent of rate), and Impulse (444 kSPS, power scaled to throughput).
It features separate analog (AVDD/AGND), digital (DVDD/DGND), and I/O interface (OVDD/OGND) power domains, with dedicated REFGND and INGND pins for precision reference and analog input grounding. The device guarantees no missing codes across its full 16-bit range and provides immediate data availability post-conversion with zero pipeline latency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes - ensures full dynamic range utilization and deterministic code mapping for metrology-grade measurement. |
| Throughput Rate | 570 kSPS in Warp Mode (1.75 µs cycle) - enables real-time spectral analysis up to Nyquist frequency of 285 kHz. |
| INL | ±2.5 LSB max - corresponds to ±0.0038% of full scale, supporting 16-bit linearity-critical applications like precision instrumentation. |
| SNR / THD | 90 dB typical SNR and –100 dB THD at 180 kHz - meets requirements for high-fidelity signal capture in communication and medical instruments. |
| Input Ranges | Bipolar: ±10 V, ±5 V, ±2.5 V; Unipolar: 0–10 V, 0–5 V, 0–2.5 V - selectable via external resistor network per Table I, eliminating need for external gain/level-shift stages. |
| Power Dissipation | 64 mW typical at 570 kSPS; 7 µW in power-down - supports thermally constrained embedded systems and battery-backed DAQ modules. |
| Interface | Parallel (8/16-bit) + Serial (SPI/QSPI/MICROWIRE/DSP-compatible) - allows direct FPGA/CPU connection or daisy-chained multi-ADC configurations. |
Pinout & Package
AD7665ACP is available in a 48-lead LQFP (ST-48) package with exposed paddle connected to AGND. Pin functions are fully defined in the Analog Devices datasheet Rev. C, including dual-role pins for serial/parallel operation and mode-select inputs (WARP, IMPULSE, SER/PAR).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CNVST | Digital input | Falling-edge-triggered conversion start; in Impulse Mode, hold-low initiates immediate conversion after acquisition phase. |
| BUSY | Digital output | Active-high indicates ongoing conversion; falling edge signals valid data ready for read - usable as hardware handshake clock. |
| D[15:0] | Parallel data bus (bidirectional) | Configurable 8- or 16-bit output; BYTESWAP selects LSB-first or MSB-first byte ordering for processor alignment. |
| SER/PAR | Digital input | Selects interface mode: LOW = parallel (D[15:0] active); HIGH = serial (D[1:0], D[2:3], D[8:11] repurposed as SDOUT/SCLK/SYNC/SDIN). |
| WARP / IMPULSE | Digital inputs | Independent mode selection: WARP HIGH + IMPULSE LOW = 570 kSPS; IMPULSE HIGH + WARP LOW = power-proportional 444 kSPS; both LOW = 500 kSPS Normal Mode. |
| REF / REFGND | Analog inputs | External reference voltage (2.3–2.5 V or AVDD–1.85 V) with dedicated ground - critical for achieving specified INL and gain accuracy. |
| INA(R), INB(2R), INC(4R), IND(4R) | Analog inputs | Resistive scaler terminals - configuration per Table I sets input range and impedance (e.g., ±5 V range = 3.41 kΩ differential input impedance). |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay | Conversion results available immediately after BUSY goes low - eliminates timing uncertainty in closed-loop control and multiplexed multi-channel systems. |
| Three selectable operating modes | Warp (570 kSPS), Normal (500 kSPS), Impulse (444 kSPS) - enables dynamic trade-off between speed, accuracy, and power without hardware change. |
| Single 5 V supply operation | AVDD = DVDD = 5 V ±5%; OVDD supports 2.7–5.25 V - simplifies power design and enables direct interfacing to 3 V or 5 V logic families. |
| Factory-calibrated ac/dc performance | Guaranteed SNR, THD, INL, and gain/offset specs over –40°C to +85°C - reduces system-level calibration burden in industrial and medical equipment. |
| Pin-to-pin compatible upgrade | Direct replacement for AD7663 and AD7664 - allows performance enhancement in existing designs without PCB revision. |
Applications
| Data Acquisition Systems | Communications Test Equipment |
|---|---|
|
Use Scenario: High-channel-count modular DAQ with multiplexed analog inputs and real-time FFT processing. IC Role / Device Role / Timing Role: Primary SAR ADC front-end capturing synchronized samples across multiple channels with zero latency. Use Value: 570 kSPS Warp Mode enables 285 kHz Nyquist bandwidth per channel; no missing codes ensures integrity of spectral analysis outputs. |
Use Scenario: Baseband signal analyzer measuring modulation quality of LTE/WiFi RF transceivers. IC Role / Device Role / Timing Role: Digitizer for IF or baseband analog waveforms prior to digital demodulation and error vector magnitude (EVM) calculation. Use Value: 90 dB SNR and –100 dB THD at 180 kHz preserve signal fidelity required for <–35 dBc EVM compliance testing. |
| Medical Imaging Front-Ends | Industrial Process Monitoring |
|
Use Scenario: Ultrasound beamformer digitizing echo return signals from phased-array transducers. IC Role / Device Role / Timing Role: High-linearity ADC sampling time-aligned RF echoes with precise gain staging and DC offset rejection. Use Value: ±2.5 LSB INL and bipolar ±5 V input range support accurate amplitude reconstruction of weak echo signals across dynamic range. |
Use Scenario: Distributed control system (DCS) node acquiring sensor data (pressure, temperature, flow) with local preprocessing. IC Role / Device Role / Timing Role: Precision analog input stage converting conditioned sensor outputs into calibrated digital values for PLC or RTU ingestion. Use Value: 16-bit resolution with guaranteed monotonicity ensures sub-0.01% measurement repeatability in closed-loop PID control loops. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed precision ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7664ACPZ | 16-bit, 500 kSPS, identical pinout and interface; lacks Warp Mode (no 570 kSPS capability); slightly lower SNR (89 dB typ). | Best suited for cost-sensitive applications where 500 kSPS suffices and maximum throughput is not required. | Select AD7664ACPZ when system throughput budget is ≤500 kSPS and BOM cost optimization is prioritized over peak speed. |
| AD7671ASTZ | 16-bit, 1 MSPS, 52-pin TQFP; higher speed but requires dual supplies (±5 V analog, +5 V digital); no Impulse Mode power scaling. | Targeted at high-throughput test equipment needing >570 kSPS, with tolerance for increased layout complexity and power consumption. | Choose AD7671ASTZ only when sustained >570 kSPS is mandatory and dual-supply infrastructure is already present. |
Compared with AD7664ACPZ and AD7671ASTZ, the AD7665ACP uniquely balances 570 kSPS Warp Mode, single 5 V supply, Impulse Mode power scaling, and pin compatibility with legacy AD7663/AD7664 - making it optimal for upgrading existing designs while adding speed headroom and thermal efficiency.
Availability
AD7665ACP is available at Aetrix Electronics and suitable for data acquisition, communications test equipment, and medical instrumentation requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for AD7665ACP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD7665ACP belongs to the PulSAR® family of precision SAR ADCs, designed specifically for high-speed, low-latency, wide-dynamic-range measurement in industrial, medical, and communications systems.
FAQ
What are the supported analog input voltage ranges for the AD7665ACP?
The AD7665ACP supports bipolar input ranges of ±10 V, ±5 V, and ±2.5 V, and unipolar ranges of 0–10 V, 0–5 V, and 0–2.5 V. These are configured using external connections to the INA(R), INB(2R), INC(4R), and IND(4R) pins per Table I in the datasheet. The AD7665ACP's internal resistive scaler ensures consistent 0–2.5 V DAC input regardless of selected range, maintaining accuracy across all configurations.
Does the AD7665ACP require an external reference voltage?
Yes, the AD7665ACP requires an external reference voltage applied to the REF pin, with REFGND tied to a clean analog ground. The reference voltage must be between 2.3 V and 2.5 V (or AVDD – 1.85 V), and the device draws up to 114 µA from it at 570 kSPS. Using a low-noise, high-stability reference such as the ADR435 is recommended to achieve specified INL and SNR performance in the AD7665ACP.
How does the Warp Mode differ from Normal Mode in the AD7665ACP?
In Warp Mode (WARP = HIGH, IMPULSE = LOW), the AD7665ACP achieves 570 kSPS throughput with a 1.75 µs conversion cycle, but requires a minimum inter-conversion interval to maintain full accuracy. In Normal Mode (both WARP and IMPULSE LOW), it operates at 500 kSPS with no minimum interval constraint - ensuring full dc and ac specifications across arbitrary sampling rates. This makes Normal Mode preferable for asynchronous or event-triggered acquisition in the AD7665ACP.
Can the AD7665ACP interface directly with a 3 V microcontroller?
Yes, the AD7665ACP supports 3 V logic levels via its OVDD supply (2.7–5.25 V) and configurable digital I/Os. When OVDD = 3 V, the serial interface (SDOUT, SCLK, SYNC) and parallel data outputs operate at 3 V logic thresholds, enabling direct connection to 3 V FPGAs or MCUs without level shifters. The AD7665ACP's VIH/VIL specs guarantee compatibility with standard 3 V CMOS interfaces.
Is the AD7665ACP pin-compatible with earlier Analog Devices ADCs?
Yes, the AD7665ACP is pin-to-pin compatible with the AD7663 and AD7664, sharing identical 48-lead LQFP and LFCSP footprints, power pin assignments, and interface signal mapping. This allows drop-in replacement in existing designs to gain Warp Mode speed, improved SNR, and Impulse Mode power scaling - all without PCB modification or firmware changes for the AD7665ACP.
AD7665ACP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PulSAR®
- Package/Case:
- 48-VFQFN Exposed Pad, CSP
- Packaging:
- Bag
- Product Status:
- Obsolete
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 570k
- Number of Inputs:
- -
- Input Type:
- -
- Data Interface:
- -
- Configuration:
- -
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- -
- Reference Type:
- -
- Voltage - Supply, Analog:
- -
- Voltage - Supply, Digital:
- -
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 48-LFCSP-VQ (7x7)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7665ACP FAQ
1.How can I place an order for AD7665ACP through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7665ACP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7665ACP reliable?
The price and inventory of AD7665ACP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7665ACP is usually 5 days.
3.What payment methods are accepted for AD7665ACP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7665ACP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7665ACP?
AD7665ACP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7665ACP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7665ACP?
For technical support, including AD7665ACP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7665ACP requirements.
6.How does Aetrix verify that AD7665ACP is sourced from the original manufacturer or authorized distributors?
All AD7665ACP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7665ACP meets industry standards.
7.What is the process for return or replacement of AD7665ACP?
All AD7665ACP units undergo pre-shipment inspection (PSI). If there is an issue with AD7665ACP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7665ACP part is unused and in its original packaging.
Return procedure for AD7665ACP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7665ACP Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

