Analog Devices Inc. AD7666ACPZ

Overview

AD7666ACPZ from Analog Devices is a 16-bit, 500 kSPS charge redistribution SAR analog-to-digital converter with integrated 2.5 V reference, ±2.0 LSB INL, and dual 5 V/3 V serial/parallel interface. It operates from a single 5 V supply, delivers 88 dB S/(N+D) at 20 kHz, and targets precision data acquisition in medical instruments and spectrum analysis systems.

For engineers reviewing the AD7666ACPZ datasheet, AD7666ACPZ pinout, AD7666ACPZ application, or AD7666ACPZ equivalent, key selection factors include unipolar 0 V to 2.5 V input range, no pipeline delay, internal reference drift ≤15 ppm/°C, and compatibility with SPI/QSPI/MICROWIRE/DSP controllers.

Technical Context

The AD7666ACPZ implements a hardware-calibrated charge redistribution SAR architecture with on-chip error correction circuitry, eliminating pipeline latency and enabling immediate data availability post-conversion. Its internal conversion clock, reference buffer control (PDBUF), and reference enable (PDREF) pins allow flexible reference configuration-internal 2.5 V reference or external source.

It supports three digital interface modes: parallel 16-bit output, master serial read during convert, and master serial read after convert-with programmable SCLK division (DIVSCLK[1:0]), SYNC polarity (INVSYNC), and clock inversion (INVSCLK) for timing optimization across host platforms.

Key Specifications

Pinout & Package

AD7666ACPZ is housed in a 48-lead LFCSP (Lead Frame Chip Scale Package) with exposed paddle, optimized for low thermal resistance (θ_JA = 26°C/W) and minimal board footprint. Pin functions are fully defined for both parallel and serial operation, with multiplexed DATA pins supporting mode-selectable roles.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit SAR ADC applications.

Compared with AD7667BCPZ and ADS8860IPWR, the AD7666ACPZ uniquely balances 500 kSPS throughput, integrated 2.5 V reference, dual serial/parallel interface, and LFCSP thermal performance-making it optimal for mid-speed, self-contained precision DAQ modules.

Availability

AD7666ACPZ is available at Aetrix Electronics and suitable for medical instrumentation, spectrum analysis, and industrial data acquisition requiring stable component supply, long-term lifecycle support, and guaranteed lot-to-lot parametric consistency.

Supply support for AD7666ACPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7666ACPZ belongs to the PulSAR® family of precision SAR ADCs designed for applications demanding high resolution, fast throughput, and integrated reference stability without external calibration.

FAQ

What is the maximum sampling rate supported by the AD7666ACPZ?

The AD7666ACPZ supports a maximum throughput rate of 500 kSPS, corresponding to a minimum conversion cycle time of 2 µs. This is achieved using its internal conversion clock and charge redistribution SAR architecture, with no pipeline delay. At this rate, the device consumes 81 mW typical power with internal reference enabled. The AD7666ACPZ maintains full 16-bit performance-including ±2.0 LSB INL and 88 dB S/(N+D)-across the entire specified temperature range of –40°C to +85°C.

Does the AD7666ACPZ require an external reference voltage?

No, the AD7666ACPZ does not require an external reference voltage-it integrates a factory-trimmed 2.5 V reference with ±15 ppm/°C max temperature drift and 50 ppm hysteresis. The PDREF pin controls internal reference enable/disable: driving PDREF LOW activates the internal reference, while driving it HIGH disables it and allows use of an external reference applied to REFBUFIN. When using the internal reference, PDBUF must also be driven LOW to enable the internal buffer for stable 2.5 V output.

How does the AD7666ACPZ handle digital interface selection between serial and parallel modes?

The AD7666ACPZ uses the SER/PAR pin to select interface mode: logic LOW configures the device for 16-bit parallel output on D0–D15, while logic HIGH enables serial mode where D8–D11 become SDOUT, SCLK, SYNC, and RDERROR. In serial mode, additional configuration pins-including EXT/INT (external/internal clock select), INVSYNC (SYNC polarity), and INVSCLK (clock inversion)-define timing behavior. The BYTESWAP pin further controls MSB/LSB byte ordering in parallel mode, supporting both 8-bit and 16-bit host bus configurations.

What is the purpose of the TEMP pin on the AD7666ACPZ?

The TEMP pin on the AD7666ACPZ provides an analog voltage output proportional to the die temperature: 300 mV at +25°C with a sensitivity of 1 mV/°C. This output is buffered and ratiometric to AVDD, allowing direct ADC measurement by a microcontroller's auxiliary channel. It enables real-time thermal monitoring for system-level derating, ambient compensation of reference drift, or fault detection-without requiring external temperature sensors. The TEMP pin is active regardless of PD or power-down state, as long as AVDD is powered.

Can the AD7666ACPZ operate from a 3 V supply?

The AD7666ACPZ requires AVDD and DVDD to be supplied at 5 V (4.75 V to 5.25 V) for guaranteed specification compliance, including 16-bit resolution, ±2.0 LSB INL, and 500 kSPS throughput. However, the OVDD supply-which powers the digital I/O interface-supports 2.7 V to 5.25 V, enabling direct interfacing with 3 V microcontrollers, FPGAs, or DSPs. Using a 3 V OVDD with 5 V AVDD/DVDD preserves full analog performance while simplifying level translation in mixed-voltage systems.