Analog Devices Inc. AD7667ACP
- Part No.:
- AD7667ACP
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 48-VFQFN Exposed Pad, CSP
- Datasheet:
-
AD7667ACP.pdf
- Description:
- IC ADC 16BIT UNIPOLAR 48-LFCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD7667ACP from Analog Devices is a 16-bit, 1 MSPS charge redistribution SAR analog-to-digital converter with integrated 2.5 V reference, unipolar 0 V to 2.5 V input range, and dual serial/parallel interface. It operates from a single 5 V supply and delivers ±2.0 LSB INL, 88 dB S/(N+D) at 20 kHz, and no missing codes - used in high-accuracy data acquisition systems requiring low-latency sampling without pipeline delay.
For engineers reviewing the AD7667ACP datasheet, AD7667ACP pinout, AD7667ACP application, or AD7667ACP equivalent, this page provides verified technical context, mode-specific throughput behavior (Warp/Normal/Impulse), real-world interface timing constraints, and validated alternatives for medical instrumentation, battery-powered DSP front-ends, and industrial process control signal chains.
Technical Context
The AD7667ACP implements a factory-calibrated charge redistribution SAR architecture with internal error correction circuitry, eliminating pipeline delay and supporting three deterministic conversion modes: Warp (1 µs cycle, 1 MSPS), Normal (1.25 µs, 800 kSPS), and Impulse (1.5 µs, 666 kSPS with throughput-scaled power). Its internal 2.5 V reference exhibits ±3 ppm/°C typical drift and is buffered via dedicated PDBUF/PDREF control pins.
It features dual-mode digital interfacing: parallel 16-bit bus with RD/CS/BUSY handshaking, and SPI/QSPI/MICROWIRE-compatible serial port with configurable SYNC polarity, SCLK inversion, and external/internal clock selection via DIVSCLK[1:0], EXT/INT, and INVSCLK pins - all operating across 3 V or 5 V logic levels on separate OVDD rail.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes - guarantees monotonicity and full-scale code coverage for precision measurement. |
| Throughput | 1 MSPS (Warp), 800 kSPS (Normal), 666 kSPS (Impulse) - selectable via WARP/IMPULSE pins for latency vs. power trade-off. |
| INL | ±2.0 LSB max (±0.0038% FS) - enables <12-bit effective linearity without post-calibration in DC-critical applications. |
| S/(N+D) | 88 dB min @ 20 kHz - supports clean digitization of audio-band and sensor signals with >14 ENOB. |
| Reference | 2.5 V internal, ±3 ppm/°C typical drift - eliminates external reference component count while maintaining stability over –40°C to +85°C. |
| Power Dissipation | 133 mW typ @ 1 MSPS with REF; 130 µW @ 1 kSPS without REF - enables ultra-low-power operation in Impulse mode. |
| Analog Input Range | 0 V to 2.5 V unipolar - simplifies signal conditioning for grounded-sensor interfaces like RTDs or strain gauges. |
Pinout & Package
AD7667ACP is packaged in a 48-lead LQFP (ST-48) with exposed pad, pin-compatible with AD7671 and AD7677. Pin functions are mode-dependent: SER/PAR selects between parallel data bus (D[0:15]) and multiplexed serial interface (SDOUT/SCLK/SYNC/SDIN), while WARP, IMPULSE, PDREF, and PDBUF configure conversion speed and reference sourcing.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IN, INGND | Analog input differential pair | Accepts 0 V to 2.5 V unipolar signal referenced to INGND; CMRR ≥64 dB at 100 kHz ensures noise rejection. |
| REF, REFGND | Internal reference output | Provides 2.5 V ±0.007 V at 25°C; requires 10 µF capacitor for <5 ms turn-on settling per spec. |
| CNVST | Conversion start trigger | Falling-edge–initiated sampling; aperture delay = 2 ns - critical for low-jitter synchronized acquisition. |
| BUSY | Conversion status flag | Active-HIGH pulse indicates conversion in progress; falling edge serves as reliable data-ready strobe. |
| SER/PAR, OB/2C, BYTESWAP | Interface configuration inputs | Select serial vs. parallel mode, straight binary vs. twos-complement output, and byte ordering - enables direct FPGA/CPU integration. |
| PDBUF, PDREF | Reference buffer enable/control | PDREF = LOW enables internal reference; PDBUF = LOW activates internal buffer - decouples reference drive from load variations. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay | Immediate data availability after BUSY goes LOW - eliminates latency uncertainty in real-time closed-loop control. |
| Three-speed conversion modes | Warp (1 MSPS), Normal (800 kSPS), Impulse (666 kSPS) - allows dynamic power/performance scaling without firmware change. |
| Internal 2.5 V reference | ±3 ppm/°C typical drift, ±15 ppm/°C max - meets Class I medical instrument temperature stability requirements without external components. |
| 5 V single-supply operation | AVDD = DVDD = 5 V ±5%; OVDD supports 2.7–5.25 V - simplifies power design and enables mixed-voltage host interfacing. |
| Serial + parallel interface | Hardware-selectable SPI/QSPI/MICROWIRE or 16-bit parallel bus - supports legacy microcontrollers and high-throughput FPGAs. |
Applications
| Medical ECG Front-End | Digital Oscilloscope Acquisition |
|---|---|
Use Scenario: Digitizing low-amplitude, high-impedance biopotential signals from electrode arrays with minimal added noise and distortion. IC Role / Device Role / Timing Role: Primary SAR ADC capturing 16-bit samples at up to 1 MSPS with sub-ns aperture jitter and no pipeline latency. Use Value: 88 dB S/(N+D) and –96 dB THD preserve waveform fidelity for arrhythmia detection; internal reference avoids calibration drift across clinical temperature ranges. |
Use Scenario: High-fidelity transient capture in portable oscilloscopes requiring fast sampling, deterministic timing, and low power during standby. IC Role / Device Role / Timing Role: Core acquisition engine with Warp mode enabling 1 µs conversion cycles and BUSY-driven data latching. Use Value: No missing codes and ±2.0 LSB INL ensure accurate amplitude measurement; Impulse mode reduces idle power to 130 µW for battery longevity. |
| Industrial Process Controller | Battery-Powered Data Logger |
Use Scenario: Monitoring slow-varying analog sensor outputs (e.g., pressure, temperature) in harsh environments with long-term stability demands. IC Role / Device Role / Timing Role: Precision unipolar ADC with internal 2.5 V reference and –40°C to +85°C guaranteed operation. Use Value: ±15 ppm/°C max reference drift and ±1.0 ppm/°C zero/full-scale drift maintain calibration integrity over thermal cycling without field recalibration. |
Use Scenario: Multi-channel environmental sensing in remote deployments where energy harvesting or coin-cell operation limits average current. IC Role / Device Role / Timing Role: Low-duty-cycle ADC using Impulse mode and PD pin to enter deep sleep between triggered conversions. Use Value: 130 µW at 1 kSPS and hardware-controlled power-down reduce quiescent draw - extends 10-year battery life in wireless sensor nodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 16-bit SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7671ASTZ | Same 48-lead LQFP package and pinout; 16-bit, 1 MSPS, but true bipolar input (±10 V) and no internal reference - requires external REF and level-shifting circuitry. | Used in motor control feedback loops needing signed voltage measurement; unsuitable for unipolar-only systems without redesign. | Select AD7671ASTZ only when bipolar input range and external reference flexibility outweigh added BOM cost and layout complexity. |
| AD7666BCPZ | 16-bit, 500 kSPS, 48-lead LFCSP; shares PulSAR® architecture and serial/parallel interface but lacks Warp mode and has lower throughput. | Targeted at space-constrained, lower-speed applications like portable multimeters; not drop-in for AD7667ACP's 1 MSPS requirement. | Choose AD7666BCPZ when footprint reduction (LFCSP) and 500 kSPS suffice - avoid if system requires 1 MSPS or LQFP compatibility. |
Compared with AD7671ASTZ and AD7666BCPZ, the AD7667ACP uniquely combines unipolar 0–2.5 V input, integrated reference, Warp-mode 1 MSPS, and LQFP pin compatibility - making it optimal for cost-sensitive, high-accuracy, single-supply data acquisition where external reference omission and deterministic latency are design priorities.
Availability
AD7667ACP is available at Aetrix Electronics and suitable for medical instrumentation, industrial process control, and portable test equipment requiring stable component supply, long-lifecycle support, and guaranteed parametric performance across temperature.
Supply support for AD7667ACP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D and manufacturing infrastructure spanning North America, Europe, and Asia.
The AD7667ACP belongs to Analog Devices' PulSAR® family of precision SAR ADCs, designed specifically for applications demanding high resolution, fast throughput, low power, and integrated reference stability - targeting data acquisition, medical imaging, and industrial automation.
FAQ
What is the maximum sampling rate of the AD7667ACP and under what conditions?
The AD7667ACP achieves a maximum sampling rate of 1 MSPS in Warp mode, which requires WARP = HIGH and IMPULSE = LOW. This mode mandates a minimum conversion rate to guarantee full specified accuracy; timing is defined by a 1 µs complete cycle with 1 ms minimum time between conversions. The AD7667ACP maintains this rate with 88 dB S/(N+D) and ±2.0 LSB INL across –40°C to +85°C when powered from AVDD = DVDD = 5 V.
Does the AD7667ACP require an external reference, or can it operate with its internal reference?
The AD7667ACP can operate fully autonomously using its internal 2.5 V reference, enabled by pulling PDREF LOW. The internal reference exhibits ±3 ppm/°C typical drift and requires a 10 µF capacitor on the REF pin for 5 ms turn-on settling. External references (2.3 V to AVDD – 1.85 V) may be used by setting PDREF HIGH and driving REFBUFIN - but the AD7667ACP's internal reference eliminates BOM cost and board area in most unipolar applications.
How does the AD7667ACP handle power management in low-duty-cycle applications?
The AD7667ACP supports three power-aware modes: Impulse mode (IMPULSE = HIGH) scales power linearly with throughput down to 666 kSPS; PD pin asserts deep power-down between conversions; and REF/PDBUF control allows disabling reference/buffer during idle periods. At 1 kSPS with REF disabled, the AD7667ACP draws just 130 µW - enabling multi-year battery life in intermittent-sampling data loggers.
Is the AD7667ACP pin-compatible with other devices in the PulSAR® family?
Yes, the AD7667ACP is pin-to-pin compatible with the AD7671 and AD7677 in 48-lead LQFP packages, sharing identical pin assignments for power, ground, analog input, reference, and digital interface signals. However, functional differences exist: AD7671 supports true bipolar input and lacks internal reference, while AD7677 adds true differential input - so PCB reuse is possible, but firmware and signal conditioning must be verified per device.
What digital interface options does the AD7667ACP support, and how are they selected?
The AD7667ACP supports both parallel and serial interfaces selected via the SER/PAR pin: LOW enables 16-bit parallel data bus (D[0:15]) with RD/CS/BUSY handshaking; HIGH configures pins D7–D11 as SDOUT/SCLK/SYNC/SDIN for SPI/QSPI/MICROWIRE operation. Interface behavior is further configured by OB/2C (output format), BYTESWAP (byte order), and EXT/INT (clock source), all documented in the AD7667ACP datasheet timing tables.
AD7667ACP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PulSAR®
- Package/Case:
- 48-VFQFN Exposed Pad, CSP
- Packaging:
- Bag
- Product Status:
- Obsolete
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 1M
- Number of Inputs:
- -
- Input Type:
- -
- Data Interface:
- -
- Configuration:
- -
- Ratio - S/H:ADC:
- -
- Number of A/D Converters:
- 1
- Architecture:
- -
- Reference Type:
- -
- Voltage - Supply, Analog:
- -
- Voltage - Supply, Digital:
- -
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 48-LFCSP-VQ (7x7)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7667ACP FAQ
1.How can I place an order for AD7667ACP through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7667ACP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7667ACP reliable?
The price and inventory of AD7667ACP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7667ACP is usually 5 days.
3.What payment methods are accepted for AD7667ACP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7667ACP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7667ACP?
AD7667ACP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7667ACP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7667ACP?
For technical support, including AD7667ACP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7667ACP requirements.
6.How does Aetrix verify that AD7667ACP is sourced from the original manufacturer or authorized distributors?
All AD7667ACP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7667ACP meets industry standards.
7.What is the process for return or replacement of AD7667ACP?
All AD7667ACP units undergo pre-shipment inspection (PSI). If there is an issue with AD7667ACP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7667ACP part is unused and in its original packaging.
Return procedure for AD7667ACP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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