Analog Devices Inc. AD7667ASTZ

Overview

AD7667ASTZ from Analog Devices is a 16-bit, 1 MSPS charge redistribution SAR analog-to-digital converter with integrated 2.5 V reference, unipolar 0 V to 2.5 V input range, and dual parallel/serial (SPI/QSPI/MICROWIRE/DSP-compatible) interface. It operates from a single 5 V supply and delivers 88 dB SNR at 20 kHz for high-fidelity data acquisition in medical instruments and process control systems.

For engineers reviewing the AD7667ASTZ datasheet, AD7667ASTZ pinout, AD7667ASTZ application, or AD7667ASTZ equivalent, this page provides verified technical context, mode-specific throughput values (1 MSPS Warp / 800 kSPS Normal / 666 kSPS Impulse), INL (±2.0 LSB), reference drift (±15 ppm/°C), and real-world interface timing constraints for reliable system integration.

Technical Context

The AD7667ASTZ implements a hardware-calibrated charge redistribution SAR architecture with internal error correction circuitry, eliminating pipeline delay and guaranteeing no missing 16-bit codes. Its three selectable conversion modes-Warp (1 µs cycle, 1 MSPS), Normal (1.25 µs, 800 kSPS), and Impulse (1.5 µs, 666 kSPS)-enable dynamic power scaling while maintaining full dc/ac accuracy across –40°C to +85°C.

It integrates a 2.5 V internal reference with ±15 ppm/°C max drift and supports external reference via REFBUFIN; digital interface flexibility includes 5 V/3 V–compatible parallel bus (D[15:0], BUSY, RD, CS) and serial modes (SDOUT, SCLK, SYNC) with configurable clock polarity, frame sync active state, and daisy-chain capability via RDC/SDIN.

Key Specifications

Pinout & Package

AD7667ASTZ is packaged in a 48-lead LQFP (ST-48) with exposed pad, pin-compatible with AD7671 and AD7677. Thermal resistance θ_JA = 91°C/W enables operation up to +85°C ambient without forced airflow.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit SAR ADC applications.

Compared with AD7667ASTZ, AD7671ASTZ offers higher throughput at increased power and thermal cost, while AD7664ASTZ trades internal reference integration for greater speed and THD performance - making AD7667ASTZ optimal for balanced precision, integration, and power in portable and fixed instrumentation.

Availability

AD7667ASTZ is available at Aetrix Electronics and suitable for medical instrumentation, process control systems, battery-powered data loggers, and digital signal processing applications requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for AD7667ASTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide.

The AD7667ASTZ belongs to the PulSAR® family of precision SAR ADCs engineered for high-speed, high-accuracy data acquisition in demanding industrial, medical, and instrumentation applications where dc accuracy, ac performance, and integration are critical.

FAQ

What is the maximum sampling rate of the AD7667ASTZ and under what conditions is it achieved?

The AD7667ASTZ achieves a maximum sampling rate of 1 MSPS in Warp mode, which requires the WARP pin to be HIGH and IMPULSE pin LOW. This mode mandates a minimum conversion rate to maintain full specified accuracy; timing is governed by t2 = 1 µs between conversions. The AD7667ASTZ must be operated with AVDD = DVDD = 5 V and OVDD ≥ 2.7 V to sustain this rate, and power dissipation rises to 133 mW typical with internal reference enabled.

Does the AD7667ASTZ require an external reference voltage, or does it include an internal one?

The AD7667ASTZ includes a factory-trimmed 2.5 V internal reference with ±15 ppm/°C max temperature drift and 5 ms turn-on settling time into a 10 µF capacitor. External reference operation is supported via the REFBUFIN pin when PDREF is set HIGH; in that configuration, the internal reference is disabled and the device accepts 2.3 V to (AVDD – 1.85 V) external references. The AD7667ASTZ thus offers flexible reference architecture without requiring external components for basic operation.

How does the AD7667ASTZ handle digital interface compatibility with both 3 V and 5 V microcontrollers?

AD7667ASTZ supports mixed-voltage interfacing through its OVDD supply pin, which accepts 2.7 V to 5.25 V and sets logic thresholds for all digital I/O (RD, CS, D[15:0], SDOUT, etc.). When OVDD = 3.3 V, inputs recognize VIH ≥ 2.0 V and VIL ≤ 0.8 V, while outputs drive VOH ≥ OVDD – 0.6 V and VOL ≤ 0.4 V - ensuring robust communication with 3 V FPGAs or MCUs. The AD7667ASTZ maintains full timing compliance across this range, including serial interface setup/hold times.

What are the key differences between Warp, Normal, and Impulse conversion modes on the AD7667ASTZ?

Warp mode (WARP = HIGH, IMPULSE = LOW) delivers 1 MSPS with 1 µs conversion cycle but requires sustained minimum throughput for accuracy. Normal mode (both pins LOW) provides 800 kSPS with no minimum rate constraint, ideal for asynchronous triggers. Impulse mode (IMPULSE = HIGH, WARP = LOW) scales power linearly with throughput - dissipating only 130 µW at 1 kSPS - making it optimal for duty-cycled battery operation. All modes retain identical dc/ac specifications and pin behavior on the AD7667ASTZ.

Can the AD7667ASTZ be used in daisy-chain configurations for multi-ADC systems, and how is this implemented?

Yes, the AD7667ASTZ supports daisy-chaining in serial slave mode using the RDC/SDIN pin. When EXT/INT = HIGH, SDIN accepts data from the previous ADC's SDOUT, and the AD7667ASTZ forwards its own conversion result after a 16-SCLK delay. Synchronization is maintained via shared SYNC and SCLK lines, with INVSYNC and INVSCLK enabling polarity matching. This eliminates multiplexer overhead and preserves per-channel timing integrity across synchronized sampling in multi-channel AD7667ASTZ arrays.