Analog Devices Inc. AD7671ACPZ

Overview

AD7671ACPZ from Analog Devices is a 16-bit, 1 MSPS charge redistribution SAR analog-to-digital converter operating from a single 5 V supply. It delivers ±2.5 LSB INL, 90 dB SNR at 250 kHz, and supports bipolar (±10 V, ±5 V, ±2.5 V) and unipolar (0–10 V, 0–5 V, 0–2.5 V) input ranges. It serves as the high-speed precision front-end in data acquisition systems requiring no pipeline delay and dual serial/parallel interfacing.

For engineers reviewing the AD7671ACPZ datasheet, AD7671ACPZ pinout, AD7671ACPZ application, or AD7671ACPZ equivalent, this page provides verified technical context, mode-specific timing behavior, interface configuration options (SPI/QSPI/MICROWIRE/DSP-compatible), real-world power dissipation profiles (112 mW typical at 1 MSPS, 7 µW in power-down), and validated alternatives for 16-bit, sub-1-µs sampling ADC upgrades.

Technical Context

The AD7671ACPZ implements a factory-calibrated charge redistribution SAR architecture with integrated resistor-based input scaler enabling six programmable analog input ranges. Its conversion core features no pipeline latency and supports three hardware-selectable modes: Warp (1 MSPS, requires ≤1 ms inter-conversion interval for full accuracy), Normal (800 kSPS, no timing constraints), and Impulse (666 kSPS, power scaled linearly with throughput).

Dual interface capability is implemented via SER/PAR pin control: parallel mode supports 8-/16-bit bus access with BYTESWAP and OB/2C configuration, while serial mode repurposes D[2:7] pins for SYNC/SCLK/SDOUT/SDIN with master/slave clocking, active-low/high SYNC polarity (INVSYNC), and SCLK inversion (INVSCLK) - all compatible with 3 V or 5 V logic levels on OVDD.

Key Specifications

Pinout & Package

AD7671ACPZ is available in a 48-lead LFCSP (CP-48-1) package with exposed paddle connected to AGND. Pin numbering follows standard ST-48/CP-48 top-view layout; pin 1 identifier located at top-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit SAR ADC applications.

Compared with AD7671ACPZ, AD7665ASTZ offers lower cost but sacrifices 4× throughput and adaptive power control, while AD7675ACPZ adds differential input capability at the expense of single-ended compatibility - both require board redesign and do not provide pin-to-pin replacement.

Availability

AD7671ACPZ is available at Aetrix Electronics and suitable for data acquisition, communications test equipment, and medical instrumentation requiring stable component supply, long-term lifecycle support, and guaranteed traceable sourcing.

Supply support for AD7671ACPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7671ACPZ belongs to the PulSAR® family of precision SAR ADCs designed for high-speed, low-power, single-supply data acquisition in instrumentation, medical, and industrial systems where accuracy, speed, and interface flexibility are critical.

FAQ

What are the key differences between Warp Mode and Normal Mode in the AD7671ACPZ?

In Warp Mode, the AD7671ACPZ achieves 1 MSPS throughput but requires inter-conversion intervals ≤1 ms to guarantee full specified accuracy; exceeding this interval invalidates the first conversion. Normal Mode delivers 800 kSPS with no timing constraints, maintaining full accuracy regardless of conversion timing - making it ideal for asynchronous data acquisition. Both modes are selected via hardware pins WARP and IMPULSE.

Does the AD7671ACPZ support both single-ended and differential analog inputs?

The AD7671ACPZ supports only single-ended analog inputs via its four scalable input terminals (INA, INB, INC, IND) configured using external resistors per Table I. It does not implement true differential input pairs. For differential input capability, Analog Devices recommends the pin-compatible AD7675ACPZ, which uses a dedicated differential input structure and requires matched PCB routing.

How does the power consumption of the AD7671ACPZ scale across its operational modes?

The AD7671ACPZ dissipates 112 mW typical at 1 MSPS in Warp Mode, 95 mW at 666 kSPS in Impulse Mode, and 15 mW at 100 SPS - confirming linear power scaling with throughput in Impulse Mode. In power-down mode (PD = HIGH), consumption drops to 7 µW. All values assume AVDD = DVDD = 5 V, OVDD = 3.3 V, and 0–5 V input range per datasheet testing conditions.

Can the AD7671ACPZ interface directly with a 3 V microcontroller without level shifters?

Yes - the AD7671ACPZ supports 3 V logic interfacing via its OVDD supply pin (2.7–5.25 V), which powers all digital I/Os including CS, RD, BUSY, and serial interface pins. When OVDD = 3.3 V, VOH ≥ 2.7 V and VOL ≤ 0.4 V meet standard 3 V CMOS thresholds, enabling direct connection to 3 V MCUs without external level translation.

What is the purpose of the BYTESWAP and OB/2C pins on the AD7671ACPZ?

BYTESWAP controls byte ordering in parallel mode: LOW outputs LSB on D[7:0], MSB on D[15:8]; HIGH swaps them. OB/2C selects output coding: HIGH yields straight binary (0x0000 = 0 V, 0xFFFF = full-scale); LOW inverts MSB for twos complement (0x8000 = 0 V, 0x0000 = –FS, 0xFFFF = +FS – 1 LSB). Both are static configuration pins sampled at CNVST edge.