Analog Devices Inc. AD7674ASTZ

Overview

AD7674ASTZ from Analog Devices is an 18-bit, 800 kSPS, fully differential successive approximation register (SAR) analog-to-digital converter operating on a single 5 V supply. It delivers ±2.5 LSB INL, 103 dB dynamic range, and supports parallel (18-/16-/8-bit) or SPI/QSPI/MICROWIRE-compatible serial interface - used in high-precision CT scanner front-ends and geophone data acquisition systems.

For engineers reviewing the AD7674ASTZ datasheet, AD7674ASTZ pinout, AD7674ASTZ application, or AD7674ASTZ equivalent, this page provides verified technical context, real-world interface timing constraints, differential input handling at ±VREF, power scaling across warp/normal/impulse modes, and validated drop-in alternatives for medical and seismic instrumentation design.

Technical Context

The AD7674ASTZ implements a charge redistribution SAR architecture with no pipeline delay, enabling immediate conversion result availability and deterministic latency. Its internal reference buffer accepts 2.5 V on REFBUFIN to generate a stable 4.096 V reference output, while differential analog inputs (IN+, IN−) support ±VREF ranges up to ±5 V with 65 dB CMRR at 100 kHz.

Three selectable conversion modes - warp (800 kSPS), normal (666 kSPS), and impulse (570 kSPS) - directly govern power dissipation (98 mW / 78 mW / 160 µW respectively) and zero error drift (±0.5 ppm/°C). The device integrates dual digital domains (OVDD for I/O, DVDD for core logic) and separate analog/digital ground planes (AGND/DGND/OGND) to maintain 100 dB SINAD at 2 kHz.

Key Specifications

Pinout & Package

AD7674ASTZ is packaged in a 48-lead LQFP (ASTZ suffix) with exposed pad internally connected to AGND. Pin assignments are validated per Analog Devices Rev. B datasheet Figure 4 and Table 6.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-resolution SAR ADC applications.

Compared with AD7679ASTZ and AD7677ASTZ, the AD7674ASTZ uniquely delivers 800 kSPS warp mode with lowest zero error and highest SFDR - making it the only option among the three for time-critical medical imaging and high-fidelity spectrum analysis where latency and spurious content are design-limiting factors.

Availability

AD7674ASTZ is available at Aetrix Electronics and suitable for CT scanners, geophysical sensor arrays, and medical ultrasound systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing from authorized channels.

Supply support for AD7674ASTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and ISO 9001-certified manufacturing.

The AD7674ASTZ belongs to Analog Devices' PulSAR® family of precision SAR ADCs, engineered specifically for high-dynamic-range data acquisition in medical imaging, seismic sensing, and test equipment where speed, linearity, and noise performance are non-negotiable.

FAQ

What is the maximum sampling rate of the AD7674ASTZ and under what conditions is it achieved?

The AD7674ASTZ achieves a maximum throughput of 800 kSPS in warp mode, which requires WARP pin high and IMPULSE pin low. This mode mandates minimum conversion rate enforcement to guarantee full specified accuracy including ±2.5 LSB INL and 100 dB SINAD. At 800 kSPS, power dissipation is 98 mW typical with AVDD = DVDD = 5 V and OVDD = 5 V.

Does the AD7674ASTZ require an external reference voltage, or does it include an internal reference?

The AD7674ASTZ does not include a built-in reference but integrates a precision reference buffer. When 2.5 V is applied to REFBUFIN, the buffer outputs a highly stable 4.096 V reference on the REF pin. Alternatively, an external reference up to 5 V may be connected directly to REF, bypassing the buffer by pulling PDBUF high. Both configurations are supported per the AD7674ASTZ datasheet Rev. B.

Can the AD7674ASTZ interface with 3 V microcontrollers, and how is level compatibility ensured?

Yes, the AD7674ASTZ supports 3 V logic through its independent OVDD supply rail (2.7 V to 5.25 V), which powers all digital I/O pins (D[17:0], RD, CS, BUSY, etc.). When OVDD = 3 V, VIH is +2.0 V min and VOL is 0.4 V max, ensuring reliable communication with 3 V microcontrollers without level shifters. DVDD remains at 5 V for core logic integrity.

How does the AD7674ASTZ handle simultaneous sampling across multiple devices?

The AD7674ASTZ supports synchronized multi-device operation via its CNVST input: a common falling-edge clock applied to all units initiates simultaneous sample-and-hold transitions. In serial mode, daisy-chaining is enabled using RDC/SDIN and SDOUT with EXT/INT high, allowing conversion results from multiple AD7674ASTZ devices to share one SDOUT line with 18-SCLK-period staggered output.

What are the thermal considerations for the AD7674ASTZ in continuous 800 kSPS operation?

In continuous 800 kSPS warp mode, the AD7674ASTZ dissipates 98 mW typical. For the 48-lead LQFP package (ASTZ), θJA = 91°C/W, yielding a junction-to-ambient rise of ~8.9°C above ambient. To maintain operation within −40°C to +85°C specified range, ensure adequate PCB copper area under the exposed pad (connected to AGND) and avoid enclosure hotspots exceeding 76°C ambient.