Analog Devices Inc. AD7675ACP

Overview

AD7675ACP from Analog Devices is a 16-bit, 100 kSPS, fully differential successive approximation register (SAR) analog-to-digital converter operating from a single 5 V supply. It delivers ±1.5 LSB INL, 94 dB typical S/(N+D) at 45 kHz, and no missing codes over its full 16-bit range. It serves as the precision front-end digitizer in high-fidelity data acquisition systems requiring true differential input handling and low power consumption.

For engineers reviewing the AD7675ACP datasheet, AD7675ACP pinout, AD7675ACP application, or AD7675ACP equivalent, this page provides verified technical context, interface timing constraints, package-specific thermal and layout considerations for the 48-lead LFCSP variant, and validated alternative options for system-level design continuity.

Technical Context

The AD7675ACP implements a charge redistribution SAR architecture with on-chip track/hold, internal conversion clock, and factory-calibrated error correction circuitry-eliminating pipeline delay and ensuring deterministic 10 µs conversion cycles. Its differential input stage supports ±2.5 V input range with 79 dB CMRR at 10 kHz and 3.9 MHz –3 dB bandwidth.

It integrates dual digital interface paths: parallel (8-/16-bit) and 2-wire serial (SPI/QSPI/MICROWIRE/DSP-compatible), both configurable for 3 V or 5 V logic levels via OVDD. Power management includes dynamic scaling (17 mW at 100 kSPS, 15 µW at 100 SPS) and hardware-controlled power-down mode (≤7 µW).

Key Specifications

Pinout & Package

The AD7675ACP is housed in a 48-lead Lead Frame Chip Scale Package (LFCSP), measuring 7 mm × 7 mm × 0.85 mm, with exposed paddle for thermal enhancement and specified operation from –40°C to +85°C.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit SAR ADC applications.

Compared with AD7675ACP, AD7660AST trades accuracy for speed and lacks chip-scale packaging, while AD7676ACP maintains identical accuracy and form factor but doubles throughput at higher power-making AD7675ACP optimal for balanced precision, size, and energy efficiency.

Availability

AD7675ACP is available at Aetrix Electronics and suitable for CT scanners, portable medical instruments, battery-powered data loggers, and industrial process control systems requiring stable component supply across extended product lifecycles.

Supply support for AD7675ACP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.

The AD7675ACP belongs to Analog Devices' PulSAR® family of precision SAR ADCs, engineered for applications demanding high resolution, low power, and guaranteed monotonicity without pipeline latency-especially in medical imaging and portable instrumentation.

FAQ

What is the maximum sampling rate supported by the AD7675ACP?

The AD7675ACP supports a maximum throughput rate of 100 kSPS, corresponding to a minimum conversion cycle time of 10 µs. This is confirmed in the "Throughput Rate" specification table (Min/Typ/Max = 0/100/100 kSPS) and timing parameter t2 (Time Between Conversions = 10 µs). The AD7675ACP achieves this rate while maintaining ±1.5 LSB INL and 94 dB S/(N+D) at 45 kHz, making it suitable for high-fidelity signal capture in spectrum analysis and medical diagnostics where timing determinism is critical. The AD7675ACP does not support oversampling modes beyond its rated 100 kSPS.

Does the AD7675ACP require an external reference voltage?

Yes, the AD7675ACP requires an external reference voltage applied to the REF pin, with REFGND serving as its dedicated analog ground return. The device accepts reference voltages from 2.3 V to (AVDD – 1.85 V), supporting standard 2.5 V references like the ADR421. Reference current draw is 35 µA at 100 kSPS, and the specification explicitly states that full-scale error and zero-error values exclude reference-induced errors-confirming that reference accuracy directly impacts overall system gain and offset performance. No internal reference is integrated.

What package type is used for the AD7675ACP?

The AD7675ACP uses a 48-lead Lead Frame Chip Scale Package (LFCSP), identified in the Ordering Guide as "CP-48". This package measures 7 mm × 7 mm × 0.85 mm and features an exposed thermal paddle. It is distinct from the LQFP variant (AD7675AST) and shares pin compatibility with it but differs in thermal resistance (JA = 26°C/W vs. 91°C/W for LQFP) and mounting requirements. The LFCSP enables higher-density layouts and improved thermal performance in space-constrained applications such as handheld medical devices and portable test equipment.

Can the AD7675ACP operate with a 3 V digital interface?

Yes, the AD7675ACP supports 3 V digital logic through its OVDD supply pin, which accepts 2.7 V to 5.25 V. When OVDD is set to 3 V, all digital I/Os-including DATA[15:0], RD, CS, SER/PAR, and serial interface pins (SDOUT, SCLK, SYNC)-operate at 3 V logic levels, with VIH minimum = 2.0 V and VOL maximum = 0.4 V. This capability is explicitly stated under "DIGITAL INPUTS" and "DIGITAL OUTPUTS" in the specifications table and enables direct interfacing with 3 V FPGAs, microcontrollers, and DSPs without level-shifting circuitry.

Is the AD7675ACP pin-to-pin compatible with other devices in its family?

Yes, the AD7675ACP is pin-to-pin compatible with the AD7660 in both LQFP and LFCSP packages, as confirmed in the "FEATURES" section ("Pin-to-Pin Compatible with the AD7660") and the Ordering Guide. This compatibility extends to all 48 signal and power pins-including identical pin functions for CNVST, BUSY, REF, IN+, IN–, and interface control lines-allowing drop-in replacement on existing PCBs designed for AD7660. However, functional differences (e.g., throughput, INL, power) must be validated per application requirements.