Analog Devices Inc. AD7678ACP

Overview

AD7678ACP from Analog Devices is an 18-bit, 100 kSPS, charge redistribution SAR analog-to-digital converter with ±2.5 LSB INL, differential input range up to ±5 V, and single 5 V supply operation. It delivers 103 dB dynamic range and 100 dB S/(N+D) at 2 kHz, targeting high-accuracy data acquisition in medical CT scanners and precision instrumentation.

For engineers reviewing the AD7678ACP datasheet, AD7678ACP pinout, AD7678ACP application, or AD7678ACP equivalent, this page provides verified technical context, interface mode behavior, reference buffer configuration, power dissipation profiles across throughput, and real-world timing constraints for parallel/serial interfacing - all specific to the 48-lead LQFP package variant.

Technical Context

The AD7678ACP implements a fully differential, no-pipeline-delay SAR architecture with on-chip conversion clock, error correction, and dual-interface support (18-/16-/8-bit parallel or SPI/QSPI/MICROWIRE-compatible serial). Its internal reference buffer accepts 2.5 V on REFBUFIN and outputs 4.096 V (±0.05 V) at REF, enabling precise full-scale calibration without external components.

Interface selection is controlled by MODE0/MODE1 pins, supporting four distinct modes: 18-bit parallel, 16-bit high/low word, 8-bit byte, or serial. The BUSY signal transitions high at CNVST falling edge and remains asserted for 1.5 µs conversion time, providing deterministic timing for synchronous readout in embedded systems.

Key Specifications

Pinout & Package

The AD7678ACP is packaged in a 48-lead LQFP (7 mm × 7 mm, 0.5 mm pitch) with exposed pad internally connected to AGND. Pin 1 identifier located at top-left corner; exposed pad soldering to system AGND recommended for thermal and noise performance.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-resolution SAR ADC applications.

Compared with AD7679ACP, AD7678ACP provides adjustable reference buffering and superior linearity; compared with AD7674ACP, it delivers tighter INL and higher dynamic range while retaining full hardware compatibility - making AD7678ACP the optimal choice for new designs demanding highest fidelity.

Availability

AD7678ACP is available at Aetrix Electronics and suitable for medical imaging systems, seismic data acquisition, portable diagnostics, and RF test equipment requiring stable component supply with long-term lifecycle assurance.

Supply support for AD7678ACP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D and manufacturing facilities worldwide.

The AD7678ACP belongs to Analog Devices' PulSAR® family of precision SAR ADCs, engineered specifically for applications demanding high resolution, low noise, and deterministic timing - including medical CT, instrumentation, and industrial process control.

FAQ

What is the maximum allowed reference voltage for AD7678ACP when using the internal buffer?

The AD7678ACP internal reference buffer is designed to accept 2.5 V on the REFBUFIN pin and output 4.096 V at the REF pin. Applying voltages outside 1.8 V to 2.6 V on REFBUFIN violates the specification and may cause inaccurate REF output or damage. When PDBUF = LOW, REF must not exceed AVDD + 0.1 V (5.35 V max), and the AD7678ACP datasheet specifies 4.05 V to 4.15 V typical REF output with 2.5 V REFBUFIN.

Can AD7678ACP operate with a 3 V digital interface while using 5 V analog supply?

Yes, AD7678ACP supports mixed-voltage operation: AVDD = 5 V for analog circuitry, while OVDD can be set to 3 V for the digital output interface. The datasheet confirms OVDD range of 2.7 V to 5.25 V, and VOH/ VOL levels scale accordingly (e.g., VOH = OVDD – 0.6 V). This allows direct interfacing with 3 V FPGAs or microcontrollers without level shifters - a key feature of the AD7678ACP design.

How does the AD7678ACP handle simultaneous sampling across multiple devices?

The AD7678ACP supports synchronized multi-device operation via its CNVST input: applying a common CNVST pulse to multiple AD7678ACP units initiates simultaneous sampling. In serial daisy-chain mode (EXT/INT = HIGH), RDC/SDIN and SDOUT allow cascading conversion results onto one bus. However, the AD7678ACP itself does not include hardware for automatic inter-device timing skew compensation - board-level routing matching is required for sub-nanosecond alignment.

What is the purpose of the PDBUF pin on AD7678ACP, and what happens when it is tied HIGH?

The PDBUF pin on AD7678ACP controls the internal reference buffer: LOW enables the buffer (outputting 4.096 V from REFBUFIN = 2.5 V), while HIGH disables it. When PDBUF = HIGH, the REF pin becomes a high-impedance input requiring an external reference voltage (3 V to AVDD + 0.1 V). Disabling the buffer reduces power by ~13 mW but forfeits the precision 4.096 V source - a trade-off documented in AD7678ACP power tables.

Is AD7678ACP pin-compatible with AD7676ACP, and what are the functional differences?

No, AD7678ACP is not pin-compatible with AD7676ACP. While both are 18-bit SAR ADCs in 48-lead packages, AD7676ACP uses a different pinout (e.g., missing REFBUFIN, PDBUF, and MODE1), lacks the internal reference buffer, and has lower performance (±4 LSB INL, 96 dB SNR). The AD7678ACP datasheet explicitly lists AD7674/AD7676/AD7679 as pin-to-pin compatible upgrades - but only AD7674ACP shares identical pin functions and package dimensions with AD7678ACP.