Analog Devices Inc. AD7678ASTZ

Overview

AD7678ASTZ from Analog Devices is an 18-bit, 100 kSPS charge redistribution SAR analog-to-digital converter with ±2.5 LSB INL, differential input range up to ±5 V, and single 5 V supply operation. It delivers 103 dB dynamic range and 100 dB S/(N+D) at 2 kHz, targeting high-precision data acquisition in medical CT scanners and geophone sensor systems.

For engineers reviewing the AD7678ASTZ datasheet, AD7678ASTZ pinout, AD7678ASTZ application, or AD7678ASTZ equivalent, key selection factors include its no-pipeline-delay SAR architecture, dual parallel/serial interface (18-/16-/8-bit bus or SPI/QSPI/MICROWIRE), on-board reference buffer, and 48-lead LQFP package with validated pin functions for precision timing and noise-sensitive analog layout.

Technical Context

The AD7678ASTZ implements a fully differential switched-capacitor SAR architecture with internal conversion clock and error correction circuits. Its analog front-end supports true differential inputs (IN+, IN–) referenced to ±VREF, with 65 dB CMRR at 100 kHz and 900 kHz –3 dB input bandwidth.

Digital interface flexibility is achieved via MODE0/MODE1-controlled configuration: 18-bit parallel, 16-bit high/low word, 8-bit byte, or serial mode (with SYNC/SCLK/SDOUT). Power management includes PDBUF control for reference buffer enable/disable and PD input for low-power shutdown (180 µW @ 1 kSPS).

Key Specifications

Pinout & Package

AD7678ASTZ is housed in a 48-lead LQFP package (ST-48 footprint), with exposed pad internally connected to AGND. Pin assignments support mixed-signal partitioning: dedicated AGND/DGND/OGND pins, separate AVDD/DVDD/OVDD supplies, and isolated analog/digital I/O routing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-resolution SAR ADC applications.

Compared with AD7679ASTZ, AD7678ASTZ trades extended temperature rating for lower cost and identical performance within –40°C to +85°C; versus AD7674ASTZ, it adds on-chip reference buffering and reduces power by 18%, making it the preferred upgrade for new designs requiring precision and efficiency.

Availability

AD7678ASTZ is available at Aetrix Electronics and suitable for CT scanner subsystems, geophone data loggers, medical diagnostic instruments, and spectrum analysis equipment requiring stable component supply and long-term production continuity.

Supply support for AD7678ASTZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7678ASTZ belongs to the PulSAR® family of precision SAR ADCs designed specifically for high-dynamic-range, low-latency data acquisition in medical imaging, seismic sensing, and test equipment.

FAQ

What is the maximum recommended external reference voltage for AD7678ASTZ?

The AD7678ASTZ supports an external reference voltage range of 3 V to AVDD + 0.1 V (i.e., up to 5.35 V with 5 V AVDD). When using the internal reference buffer, apply 2.5 V to REFBUFIN to generate a precise 4.096 V reference on the REF pin. Exceeding 5.35 V on REF risks violating absolute maximum ratings and may cause permanent damage to the AD7678ASTZ.

Does AD7678ASTZ require separate analog and digital ground planes?

Yes, AD7678ASTZ requires physically separated AGND and DGND planes tied together at a single point near the device. The datasheet specifies distinct AGND (Pins 1, 44, 36), DGND (Pins 30, 20), and OGND (Pin 17) connections to minimize digital switching noise coupling into the analog signal path. Improper grounding directly degrades the AD7678ASTZ's 103 dB dynamic range and increases INL error.

Can AD7678ASTZ operate with a 3 V digital interface while using 5 V analog supplies?

Yes, AD7678ASTZ supports mixed-voltage operation: AVDD = 5 V for analog circuitry while OVDD = 3 V powers the digital output interface (Pins 17–18). This allows direct interfacing with 3 V FPGAs or microcontrollers without level shifters. DVDD must remain at 5 V to ensure proper internal logic operation, and OVDD must not exceed DVDD + 0.3 V per the AD7678ASTZ absolute maximum ratings.

How does the PDBUF pin affect AD7678ASTZ reference performance?

The PDBUF pin enables or disables the internal reference buffer: logic LOW activates the buffer (outputting 4.096 V when 2.5 V is applied to REFBUFIN), while HIGH disables it, requiring an external reference on the REF pin. With PDBUF enabled, the AD7678ASTZ achieves better PSRR and reduced reference noise, directly improving the 100 dB S/(N+D) specification. Disabling PDBUF increases design flexibility but shifts reference accuracy burden to the external source.

Is AD7678ASTZ pin-to-pin compatible with AD7674ASTZ?

Yes, AD7678ASTZ is explicitly documented as pin-to-pin compatible with AD7674ASTZ and AD7676ASTZ. All share identical 48-lead LQFP footprints, power pin assignments (AVDD, DVDD, AGND, DGND), and interface signal mapping (CNVST, BUSY, RD, CS, D[0:17]). This allows direct replacement in existing layouts, though AD7678ASTZ adds PDBUF and REFBUFIN functionality not present on AD7674ASTZ.