Analog Devices Inc. AD7685BCPZ-R2

Overview

AD7685BCPZ-R2 from Analog Devices is a 16-bit, pseudo-differential successive approximation ADC with 250 kSPS throughput, ±2 LSB max INL, 93.5 dB SINAD at 20 kHz, and single-supply operation from 2.3 V to 5.5 V. It delivers no missing codes and zero pipeline delay, enabling precision data acquisition in battery-powered medical instruments and portable instrumentation.

For engineers reviewing the AD7685BCPZ-R2 datasheet, AD7685BCPZ-R2 pinout, AD7685BCPZ-R2 application, or AD7685BCPZ-R2 equivalent, key selection criteria include its MSOP-10 package, SPI-/QSPI™-/MICROWIRE™-compatible serial interface, daisy-chain capability, 1 nA standby current, and compatibility with 1.8 V–5 V logic via dedicated VIO supply.

Technical Context

The AD7685BCPZ-R2 implements a charge redistribution SAR architecture with integrated track-and-hold, achieving 2.5 ns aperture delay and 2 MHz −3 dB input bandwidth. Its conversion is initiated on the CNV rising edge, sampling IN+ relative to IN− over 0 V to VREF range, where VREF is externally supplied up to VDD.

It supports two primary digital interface modes: CS mode (3- or 4-wire) and Chain mode (daisy-chain), both compatible with SPI protocols and featuring BUSY indicator option. Power dissipation scales linearly with throughput - 1.35 mW at 2.5 V/100 kSPS and 10 mW at 5 V/250 kSPS - with 1 nA standby current enabling ultra-low-power sleep states.

Key Specifications

Pinout & Package

The AD7685BCPZ-R2 is housed in a 10-lead MSOP package (3 mm × 3 mm footprint, 0.5 mm pitch), with exposed pad connected to GND for thermal enhancement. Pinout is identical to AD7686/AD7687/AD7688.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit SAR ADC applications.

Compared with AD7687BRMZ and ADS8860IDRCT, the AD7685BCPZ-R2 uniquely balances ultra-low standby current (1 nA), external reference flexibility, and daisy-chain support - making it optimal for multi-channel, battery-sensitive, and reference-customizable designs.

Availability

AD7685BCPZ-R2 is available at Aetrix Electronics and suitable for portable medical devices, wireless sensor networks, handheld test equipment, and industrial process transmitters requiring stable component supply and long-term obsolescence management.

Supply support for AD7685BCPZ-R2 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7685BCPZ-R2 belongs to the PulSAR® family of precision SAR ADCs, designed specifically for low-power, high-accuracy data acquisition in space-constrained and energy-sensitive applications.

FAQ

What is the maximum recommended reference voltage for AD7685BCPZ-R2?

The AD7685BCPZ-R2 supports an external reference voltage from 0.5 V up to VDD. When VDD = 5.5 V, REF may be as high as 5.5 V; however, the datasheet specifies optimal AC performance (e.g., 93.5 dB SINAD) at VREF = 5 V. Using VREF = VDD simplifies design but requires careful attention to VDD noise and regulation. The AD7685BCPZ-R2 does not regulate or buffer the REF input - external reference stability directly impacts overall accuracy.

Does AD7685BCPZ-R2 support true differential input operation?

No, the AD7685BCPZ-R2 features pseudo-differential input architecture: IN+ is sampled relative to IN−, but IN− is not actively driven and serves only as a ground-sense node. It does not accept complementary differential signals (e.g., IN+ and IN− swinging opposite-phase). For true differential input, consider AD7690 or AD7691. The AD7685BCPZ-R2's pseudo-differential topology simplifies front-end design while maintaining good common-mode rejection (65 dB at 250 kHz).

Can AD7685BCPZ-R2 operate with a 1.8 V digital interface while using a 5 V analog supply?

Yes. The AD7685BCPZ-R2 has a dedicated VIO pin that accepts 1.8 V independently of VDD (which can be 5 V). This allows direct connection to 1.8 V FPGAs or microcontrollers without level-shifting circuitry. Logic thresholds scale with VIO: VIH ≥ 0.7 × VIO and VIL ≤ 0.3 × VIO. All digital pins (CNV, SCK, SDI, SDO) comply with this interface, and timing parameters (e.g., tSCK = 20 ns min at VIO = 1.8 V) remain valid per Table 5.

How does the daisy-chain mode function on AD7685BCPZ-R2?

In daisy-chain (Chain) mode, SDI is held low at the CNV rising edge. Conversion results from multiple AD7685BCPZ-R2 devices are concatenated onto a single SDO line: the first device outputs its MSB on SDO, then shifts out remaining bits while the next device places its MSB on the same line after 16 SCK cycles. This eliminates the need for individual SDO traces and simplifies routing in multi-ADC systems. BUSY indication remains available in Chain mode if enabled via configuration.

What is the typical power consumption of AD7685BCPZ-R2 at 100 SPS?

At 100 SPS with VDD = 2.5 V, the AD7685BCPZ-R2 consumes 1.4 µW - equivalent to 560 nA average current. This ultra-low operating point is achieved by powering down between conversions, leveraging its internal conversion clock and automatic power cycling. The 1 nA standby current (measured with VDD/VIO = 5 V, 25°C) applies only when CNV is held low and no conversion is pending - making it ideal for wake-on-event architectures in battery-powered systems.