Analog Devices Inc. AD7685CCPZRL7

Overview

AD7685CCPZRL7 from Analog Devices is a 16-bit, pseudo-differential, successive-approximation ADC with 250 kSPS throughput, ±2 LSB max INL, 93.5 dB SINAD at 20 kHz, and single-supply operation from 2.3 V to 5.5 V. It features no pipeline delay, SPI-/QSPI-/MICROWIRE-compatible serial interface, and daisy-chain capability-ideal for portable data acquisition in battery-powered medical instruments and mobile communications equipment.

For engineers reviewing the AD7685CCPZRL7 datasheet, AD7685CCPZRL7 pinout, AD7685CCPZRL7 application, or AD7685CCPZRL7 equivalent, key selection considerations include its 10-lead MSOP package, 1.8 V–5 V logic interface (VIO), ±0.6 LSB typical INL, 2.5 ns aperture delay, and low 1 nA standby current-critical for precision, low-power, space-constrained embedded systems.

Technical Context

The AD7685CCPZRL7 employs a charge redistribution SAR architecture with integrated track-and-hold, enabling true 16-bit accuracy without missing codes and zero pipeline latency. Its pseudo-differential input accepts 0 V to VREF (up to VDD) with respect to IN−, and supports external reference voltages from 0.5 V to VDD.

Digital interface flexibility includes CS-mode (3- or 4-wire) and chain-mode configurations, BUSY indicator support, and 1.8 V–5 V VIO compatibility. Power dissipation scales linearly with throughput: 1.35 mW at 2.5 V/100 kSPS and 10 mW at 5 V/250 kSPS.

Key Specifications

Pinout & Package

AD7685CCPZRL7 is housed in a 10-lead MSOP (3 mm × 3 mm, 0.5 mm pitch) with exposed pad connected to GND. Pinout is identical to AD7686/AD7687/AD7688 and supports drop-in replacement in existing PulSAR® designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 16-bit SAR ADC applications.

Compared with AD7685CCPZRL7, AD7687BRMZ trades lower power and smaller footprint for doubled throughput, while ADS8860IDRCT sacrifices standby efficiency and integrated reference support for raw speed-making AD7685CCPZRL7 optimal for balanced precision, power, and size in portable instrumentation.

Availability

AD7685CCPZRL7 is available at Aetrix Electronics and suitable for battery-powered equipment, medical instruments, and mobile communications requiring stable component supply, long-term lifecycle assurance, and RoHS-compliant sourcing.

Supply support for AD7685CCPZRL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7685CCPZRL7 belongs to the PulSAR® family of precision SAR ADCs designed specifically for low-power, high-accuracy data acquisition in portable, medical, and industrial instrumentation where size, energy efficiency, and DC/AC performance must coexist.

FAQ

What is the maximum recommended reference voltage for AD7685CCPZRL7?

The AD7685CCPZRL7 supports an external reference voltage from 0.5 V up to VDD. When VDD = 5.5 V, REF may be as high as 5.5 V; however, the datasheet specifies optimal AC performance (e.g., 93.5 dB SINAD) at VREF = 5 V. Using REF = VDD simplifies design but requires careful decoupling-10 µF ceramic capacitor directly at the REF pin is mandatory per Analog Devices' layout guidelines for AD7685CCPZRL7.

Does AD7685CCPZRL7 support true differential input?

No, AD7685CCPZRL7 implements a pseudo-differential input architecture: IN+ is sampled relative to IN−, but IN− serves only as a ground sense node-not an actively driven complementary input. The input range is defined as 0 V to VREF on IN+, referenced to IN−, which must be tied to analog ground or a remote low-impedance sense point. True differential input (e.g., ±VREF) is not supported by AD7685CCPZRL7.

Can AD7685CCPZRL7 operate with a 1.8 V digital interface while using a 5 V analog supply?

Yes. AD7685CCPZRL7 separates analog (VDD) and digital I/O (VIO) supplies. With VDD = 5 V and VIO = 1.8 V, the part maintains full 16-bit performance while interfacing directly to 1.8 V FPGAs or microcontrollers-no level shifters needed. VIH threshold becomes ~1.26 V (0.7 × 1.8 V), and VOL remains ≤0.4 V, satisfying standard 1.8 V logic compatibility requirements for AD7685CCPZRL7.

What is the minimum acquisition time required for full 16-bit accuracy in AD7685CCPZRL7?

The AD7685CCPZRL7 specifies a fixed acquisition time of 1.8 µs across all supply and temperature conditions. This value is guaranteed in the datasheet (Table 4 and Table 5) and ensures the internal track-and-hold fully settles before conversion begins. Shorter acquisition intervals risk gain/offset errors and degraded INL; therefore, the CNV pulse period must accommodate ≥1.8 µs acquisition plus conversion time (e.g., 2.2 µs typ. at VDD = 5 V), totaling ≥4 µs minimum cycle time for AD7685CCPZRL7.

Is AD7685CCPZRL7 pin-compatible with other PulSAR® ADCs?

Yes. AD7685CCPZRL7 is explicitly pin-for-pin compatible with AD7686, AD7687, and AD7688 in the same 10-lead MSOP or LFCSP packages. This allows direct substitution within the same footprint for resolution (14/16/18-bit) or speed (100–500 kSPS) upgrades-provided the host firmware accounts for differing throughput and register mapping. No PCB redesign is needed when migrating among these AD7685CCPZRL7-compatible PulSAR® variants.