Analog Devices Inc. AD7703BN

Overview

AD7703BN from Analog Devices is a monolithic 20-bit charge-balancing sigma-delta ADC with on-chip six-pole Gaussian digital filtering, self-calibration microcontroller, and flexible serial interface. It delivers ±0.0003% integral nonlinearity (C grade), 0.1 Hz to 10 Hz programmable filter corner frequency, and 4 kSPS output data rate. It operates from ±5 V analog/digital supplies and supports unipolar (0 V to +2.5 V) or bipolar (±2.5 V) input ranges - ideal for precision weigh scale front-ends.

For engineers reviewing the AD7703BN datasheet, AD7703BN pinout, AD7703BN application, or AD7703BN equivalent, key selection considerations include its guaranteed no-missing-codes performance, ultralow 10 µW standby power, system-level offset/gain calibration capability, and compatibility with industrial loop-powered remote sensing architectures requiring high-resolution DC measurement stability.

Technical Context

The AD7703BN employs a second-order sigma-delta modulator followed by a deterministic six-pole Gaussian digital low-pass filter, enabling 55 dB 60 Hz rejection at 10 Hz cutoff. Its output register updates synchronously at f_CLKIN/1024, with settling time to ±0.0007% FS defined as 507904/f_CLKIN seconds.

Calibration is performed via dedicated SC1/SC2 control pins and CAL strobe, supporting zero-scale, full-scale, and system-level calibration modes that include external signal chain components. The device supports two serial interface modes: Synchronous Self-Clocking (SSC) with internal SCLK generation at f_CLKIN/4, and Synchronous External Clocking (SEC) with user-supplied SCLK.

Key Specifications

Pinout & Package

AD7703BN is housed in a 20-pin plastic DIP package (0.3-inch width), RoHS-compliant and rated for –40°C to +85°C operation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-resolution sigma-delta ADC applications.

Compared with AD7703BN, AD7714BN offers higher resolution but sacrifices ultralow-power capability and flexible serial interface modes, while ADS1211U trades dual-supply noise immunity and calibration flexibility for integration and single-supply convenience - making AD7703BN optimal for battery- or loop-powered precision DC measurement where long-term stability and system-level calibration are critical.

Availability

AD7703BN is available at Aetrix Electronics and suitable for industrial process control, weigh scale manufacturing, and portable instrumentation requiring stable component supply across extended temperature ranges and multi-year production cycles.

Supply support for AD7703BN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7703BN belongs to Analog Devices' precision sigma-delta ADC product line, designed specifically for high-accuracy, low-frequency measurement applications including weigh scales, process transmitters, and portable test equipment.

FAQ

What is the maximum master clock frequency supported by the AD7703BN?

The AD7703BN supports a maximum master clock frequency of 5 MHz, with typical operation at 4.096 MHz. At this frequency, the device achieves a 4 kSPS output data rate, 10 Hz filter corner, and worst-case settling time of 125 ms. Operation down to 200 kHz is guaranteed, enabling ultra-low-power configurations where reduced throughput is acceptable. The AD7703BN clock input accepts either an external TTL/CMOS signal or a crystal connected between CLKIN and CLKOUT pins.

Does the AD7703BN require external analog anti-aliasing filtering?

The AD7703BN incorporates a six-pole Gaussian digital low-pass filter with inherent alias rejection, but external analog filtering remains recommended for signals with broadband noise or large-amplitude transients exceeding ±100 mV overrange capability. Because the sigma-delta modulator can saturate on fast overvoltage spikes-even if average signal stays within range-designers should place a 1 nF capacitor from AIN to AGND and limit source impedance to ≤750 Ω. For harsh EMI environments, a simple RC filter (e.g., 10 kΩ + 10 nF) before AIN improves robustness without degrading DC accuracy.

How does the AD7703BN handle system-level calibration of external front-end components?

The AD7703BN supports system-level calibration through its SC1/SC2 pins and CAL strobe, allowing offset and gain errors from external op-amps, RTD excitation circuits, or bridge sensors to be nulled in the calibration loop. In system calibration mode (SC2 low), the device measures actual AIN voltage during zero- and full-scale calibration steps, storing correction coefficients in on-chip SRAM. This eliminates the need for separate calibration DACs or microcontroller-based compensation algorithms, and the AD7703BN retains calibrated performance across temperature without recalibration unless drift exceeds ±19 LSB full-scale drift specification.

What are the power supply requirements for reliable operation of the AD7703BN?

The AD7703BN requires dual ±5 V analog and digital supplies: AVDD = +5 V, AVSS = –5 V, DVDD = +5 V, DVSS = –5 V, with ±10% tolerance. AVDD and DVDD must be within 0.3 V of each other; AVSS and DVSS similarly constrained. Ground separation is critical: AGND and DGND must be tied together at a single point near the AD7703BN, with <0.3 V potential difference. Decoupling requires 0.1 µF ceramic capacitors from each supply pin to its respective ground, plus a 10 µF bulk capacitor on AVDD/DVDD. Failure to meet these conditions risks increased noise, calibration instability, or latch-up.

Can the AD7703BN interface directly with a microcontroller lacking a hardware SPI peripheral?

Yes - the AD7703BN supports asynchronous serial communication in SSC mode, where it generates its own SCLK at f_CLKIN/4 with 25% duty cycle, eliminating dependency on microcontroller SPI hardware. In this mode, only three wires (CS, SDATA, and optionally DRDY) are needed, and bit-banged GPIO can sample SDATA on SCLK falling edges. The AD7703BN also supports SEC mode with externally supplied SCLK up to 5 MHz, compatible with standard shift-register timing. Both modes deliver 20-bit MSB-first words, and DRDY provides ready signaling to prevent read-before-ready errors.