Analog Devices Inc. AD7712ARZ-REEL7

Overview

AD7712ARZ-REEL7 from Analog Devices is a 24-bit sigma-delta analog-to-digital converter (ADC) designed for precision low-frequency signal conditioning in industrial measurement systems. It features dual analog input channels (AIN1 differential, AIN2 single-ended), programmable gain (1–128), on-chip 2.5 V reference, and digital filtering with configurable notch frequencies up to 1 kHz. It delivers ±0.0015% integral nonlinearity and supports single- or dual-supply operation (AVDD = 5–10 V, VSS = 0 or –5 V) in smart transmitter and portable instrument applications.

For engineers reviewing the AD7712ARZ-REEL7 datasheet, AD7712ARZ-REEL7 pinout, AD7712ARZ-REEL7 application, or AD7712ARZ-REEL7 equivalent, key selection considerations include its 24-bit no-missing-codes performance at ≤60 Hz filter notches, differential AIN1 channel with transducer burnout detection (4.5 µA), self/background calibration capability, and SOIC-24 package compatibility with industrial temperature range (–40°C to +85°C).

Technical Context

The AD7712ARZ-REEL7 employs a charge-balancing sigma-delta architecture with an analog modulator followed by an on-chip digital filter whose first notch frequency is software-programmable via the control register. Its front end integrates a programmable-gain amplifier (PGA) for AIN1 and a resistor-based attenuator for AIN2, enabling simultaneous high- and low-level signal acquisition.

It supports two clocking modes: self-clocking (SCLK output) and external clocking (SCLK input), with master clock input (MCLK IN) ranging from 400 kHz to 10 MHz. The device implements three calibration modes-self-, system-, and background-with read/write access to on-chip calibration registers for microcontroller-driven calibration routines.

Key Specifications

Pinout & Package

AD7712ARZ-REEL7 is housed in a 24-lead SOIC (RW-24) package, 0.3 inch wide, RoHS-compliant, tape-and-reel format (REEL7). Pin functions are validated per Analog Devices Rev. F datasheet.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-precision sigma-delta ADC applications.

Compared with AD7712ARZ-REEL7, AD7799BRUZ offers lower quiescent power but sacrifices dual-input flexibility and transducer burnout detection, while ADS1258IPWR provides higher throughput and channel density at the cost of increased external component count and reduced DC precision in noisy environments.

Availability

AD7712ARZ-REEL7 is available at Aetrix Electronics and suitable for process control, smart transmitter, and portable industrial instrument designs requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for AD7712ARZ-REEL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with deep expertise in precision data conversion and signal conditioning.

The AD7712ARZ-REEL7 belongs to Analog Devices' LC2MOS precision sigma-delta ADC product line, engineered specifically for low-frequency industrial measurement applications demanding high resolution, excellent linearity, and robust noise immunity in harsh environments.

FAQ

What is the maximum guaranteed resolution of the AD7712ARZ-REEL7 under specified conditions?

The AD7712ARZ-REEL7 guarantees 24-bit no missing codes performance when the digital filter's first notch is set to ≤60 Hz. At higher notch frequencies-100 Hz, 250 Hz, 500 Hz, and 1 kHz-the guaranteed resolution decreases to 22, 18, 15, and 12 bits respectively, due to reduced oversampling ratio and increased noise bandwidth. This behavior is explicitly specified in the Rev. F datasheet Static Performance table and reflects real-world trade-offs between update rate and effective resolution.

Does the AD7712ARZ-REEL7 support true differential reference input?

Yes, the AD7712ARZ-REEL7 supports true differential reference input via REF IN(+) and REF IN(–) pins. The device requires REF IN(+) > REF IN(–), accepts a differential voltage range of 2.5 V to 5 V, and maintains specified performance across that range. This enables ratiometric measurements (e.g., bridge sensors powered from REF OUT) or absolute reference configurations-both validated in the Rev. F datasheet under Reference Inputs specifications and General Description.

How does the transducer burnout detection function work on the AD7712ARZ-REEL7?

The AD7712ARZ-REEL7 provides a 4.5 µA nominal current source on the AIN1(+) pin, controllable via the control register. When enabled, this current flows through the external transducer-if the sensor becomes open-circuit, the resulting voltage shift at AIN1(+) exceeds the input common-mode range, triggering a detectable condition. This feature is documented in the Rev. F datasheet under Transducer Burnout specifications and Pin Function Description for AIN1(+), eliminating need for external burnout circuitry.

Can the AD7712ARZ-REEL7 operate from a single 5 V supply?

Yes, the AD7712ARZ-REEL7 supports single-supply operation: tie VSS to AGND, set AVDD = +5 V ±5%, and DVDD = +5 V ±5%. In this configuration, the AIN1 input must remain > –30 mV relative to VSS for correct operation. The Rev. F datasheet confirms this in the General Description ("operated from a single supply by tying VSS pin to AGND") and Power Requirements section, with full specifications guaranteed under these conditions.

What is the purpose of the VBIAS pin on the AD7712ARZ-REEL7, and how should it be configured?

The VBIAS pin sets the common-mode bias point for the internal analog modulator. It must satisfy VSS + 0.85×VREF ≤ VBIAS ≤ AVDD – 0.85×VREF. Recommended configurations include: AVDD = +5 V / VSS = 0 V → tie to REF OUT (2.5 V); AVDD = +5 V / VSS = –5 V → tie to AGND (0 V); AVDD = +10 V / VSS = 0 V → tie to +5 V. This requirement and implementation guidance are detailed in the Rev. F datasheet under VBIAS Input and Pin Function Description sections.