Analog Devices Inc. AD7810YNZ

Overview

AD7810YNZ from Analog Devices is a 10-bit successive approximation ADC with 2.3 µs conversion time, pseudo-differential analog input (VIN+, VIN–), microcontroller-compatible 3-wire serial interface (CONVST/SCLK/DOUT), and automatic power-down mode-designed for low-power battery-operated instrumentation requiring high-speed sampling at 2.7 V to 5.5 V supply.

For engineers reviewing the AD7810YNZ datasheet, AD7810YNZ pinout, AD7810YNZ application, or AD7810YNZ equivalent, key selection considerations include guaranteed 10-bit no-missing-codes performance, ±1 LSB relative accuracy over –40°C to +105°C, track-and-hold acquisition time ≤100 ns, and dual operating modes (high-speed vs. auto power-down) enabling optimization between throughput and µW-level power at 10 kSPS.

Technical Context

The AD7810YNZ implements a charge redistribution DAC architecture with internal oscillator, supporting both Mode 1 (continuous operation, 2.3 µs conversion, up to ~350 kSPS) and Mode 2 (automatic power-down, 3.8 µs effective cycle time, 10 kSPS typical). Its pseudo-differential input uses VIN– as offset reference, requiring VIN– stability within ±0.5 LSB during conversion.

Serial communication is edge-triggered: CONVST rising edge enables the serial port and resets the bit counter; DOUT outputs 10-bit straight-binary data on SCLK rising edges, entering high-impedance after the 10th clock. Power-up time is 1.5 µs, and logic thresholds are specified for 2.0 V VIH min / 0.4 V VIL max at VDD = 3 V or 5 V.

Key Specifications

Pinout & Package

The AD7810YNZ is housed in an 8-lead plastic DIP (N-8 package), 0.3" wide, through-hole compatible with standard IC sockets and manual soldering processes.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 10-bit SAR ADC applications.

Compared with AD7811YNZ and ADS7822U, the AD7810YNZ delivers the lowest system-level power at 10 kSPS due to its hardware-controlled auto power-down, smallest PCB footprint in DIP form, and self-contained reference flexibility-making it ideal for cost-sensitive, battery-limited designs prioritizing integration over extended resolution.

Availability

AD7810YNZ is available at Aetrix Electronics and suitable for battery-powered test equipment, portable communications systems, and industrial sensor transmitters requiring stable component supply with guaranteed long-term manufacturability.

Supply support for AD7810YNZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7810YNZ belongs to Analog Devices' precision SAR ADC product line, engineered specifically for portable, low-power measurement systems demanding speed, accuracy, and supply flexibility in compact packages.

FAQ

What is the maximum sampling rate achievable with the AD7810YNZ?

The AD7810YNZ achieves up to ~350 kSPS in Mode 1 (high-speed continuous operation), limited by serial interface timing and microcontroller SCLK capability-not by internal conversion time. At 350 kSPS, the 2.3 µs conversion completes well before the next CONVST falling edge. Real-world throughput depends on host processor's ability to issue CONVST pulses and read DOUT within the timing window defined in the datasheet's t1–t8 parameters. The AD7810YNZ itself imposes no lower bound on minimum cycle time beyond its 2.3 µs conversion and 100 ns acquisition requirements.

Does the AD7810YNZ require an external reference voltage?

No, the AD7810YNZ does not require an external reference. Its VREF pin accepts 1.2 V to VDD, and connecting VREF directly to VDD configures the device for self-referenced operation with 0 V to VDD analog input range. This eliminates external reference components and reduces BOM count and board area. When higher accuracy or temperature stability is needed, an external precision reference (e.g., ADR391) can be applied to VREF-ensuring compliance with the 1.2 V minimum and VDD maximum limits specified in the AD7810YNZ datasheet.

How does the automatic power-down mode work on the AD7810YNZ?

The AD7810YNZ automatic power-down mode is controlled solely by the state of the CONVST pin at the end of conversion: if CONVST is low, the device powers down immediately after latching the result; a subsequent rising edge on CONVST wakes it up in 1.5 µs. This hardware-driven mechanism eliminates firmware overhead and guarantees µW-level quiescent power (1 µA at VDD = 5 V). In Mode 2, effective conversion cycle = 1.5 µs (power-up) + 2.3 µs (conversion), making it optimal for throughput rates ≤100 kSPS-where average power drops to 270 µW at 10 kSPS per the AD7810YNZ power-vs-throughput curve.

Can the AD7810YNZ interface directly with an 8051 microcontroller?

Yes, the AD7810YNZ can interface with an 8051 microcontroller, but requires SCLK inversion because the AD7810YNZ samples DOUT on the rising edge of SCLK, whereas the 8051's standard SPI peripheral drives on falling edges. This is implemented using a simple transistor inverter or a dedicated logic gate. All other timing parameters-including CONVST setup/hold, DOUT validity window (t6), and bus relinquish (t8)-are compatible with 8051 GPIO toggling speeds. The AD7810YNZ datasheet provides explicit guidance on 8051 interfacing in the Microprocessor Interfacing section, confirming functional compatibility with proper clock polarity handling.

What is the meaning of "pseudo-differential input" in the AD7810YNZ?

"Pseudo-differential input" in the AD7810YNZ means VIN+ is the active signal input while VIN– serves as a programmable offset reference-not a true complementary input. During conversion, the internal sampling capacitor connects to VIN–, allowing system-level offset cancellation (e.g., applying 0.5 V to VIN– shifts the 0–VREF range to 0.5–(VREF + 0.5) V). However, VIN– must remain stable within ±0.5 LSB during the 2.3 µs conversion; any variation causes code errors. Unlike true differential ADCs, the AD7810YNZ does not reject common-mode noise on VIN–-its primary value is flexible unipolar range adjustment, not noise immunity.