Analog Devices Inc. AD7813YRZ

Overview

AD7813YRZ from Analog Devices is a 10-bit, 400 kSPS successive approximation ADC with on-chip track-and-hold, single 2.7 V–5.5 V supply operation, and 8-bit parallel interface for microprocessor/DSP interfacing. It delivers ±1 LSB relative accuracy, 58 dB SNR at 30 kHz input, and automatic power-down mode reducing consumption to 34.6 µW at 1 kSPS - used in portable data acquisition and battery-powered sensor front-ends.

For engineers reviewing the AD7813YRZ datasheet, AD7813YRZ pinout, AD7813YRZ application, or AD7813YRZ equivalent, key selection considerations include its dual-read 10-bit output format (MSB + LSB), 2.3 µs conversion time, 1.2 V–VDD reference range, track/hold acquisition time ≤100 ns, and TSSOP-16 package compatibility with space-constrained embedded systems.

Technical Context

The AD7813YRZ implements a charge redistribution DAC architecture with internal clock oscillator and three-state TTL-compatible digital outputs. Its conversion logic is triggered by CONVST edge control, with BUSY signal indicating active conversion and automatic power cycling between conversions in Mode 2.

It supports two operational modes: high-speed continuous sampling (Mode 1) enabling 400 kSPS throughput, and automatic power-down (Mode 2) where the device powers up only before each conversion - validated by 1.5 µs power-up time and precise timing constraints on t2 (2.3 µs conversion), t8 (10 ns min delay between MSB/LSB reads), and t9 (50 ns min CS/RD to CONVST delay).

Key Specifications

Pinout & Package

AD7813YRZ is housed in a 16-lead thin shrink small outline package (TSSOP), 4.4 mm × 5.0 mm body, 0.65 mm lead pitch, JEDEC MO-187AA compliant. Pin 1 is VREF; pin 3 is shared analog/digital ground; pin 16 is VDD.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 10-bit SAR ADC applications.

Compared with AD7813YRZ, AD7812YRZ sacrifices 2 bits of resolution but retains identical power management and pinout, whereas ADS7822U trades parallel simplicity and auto-power-down for higher resolution and serial interface - making AD7813YRZ optimal for microprocessor-based systems needing balanced speed, precision, and low-power flexibility.

Availability

AD7813YRZ is available at Aetrix Electronics and suitable for portable instrumentation, industrial sensor interfaces, and medical monitoring systems requiring stable component supply, long-term manufacturability, and guaranteed RoHS-compliant sourcing.

Supply support for AD7813YRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.

The AD7813YRZ belongs to Analog Devices' legacy high-speed SAR ADC product line, designed specifically for microprocessor-coupled data acquisition where low power, parallel interface simplicity, and guaranteed 10-bit monotonicity are critical.

FAQ

What is the maximum sampling rate achievable with the AD7813YRZ?

The AD7813YRZ achieves a maximum throughput rate of 400 kSPS in Mode 1 (high-speed continuous sampling), where it remains powered up between conversions. This requires strict adherence to timing parameters including t2 ≤ 2.3 µs conversion time and minimum inter-CONVST spacing defined by t1 + t6 + t8. At lower rates, Mode 2 automatic power-down reduces average power but does not increase peak rate.

How is the 10-bit result read from the AD7813YRZ?

The AD7813YRZ outputs its 10-bit result across two consecutive 8-bit parallel reads: the first RD cycle (with CS low) places the 8 MSBs on DB7–DB0, and the second RD cycle places the 2 LSBs on DB7–DB6 while DB5–DB0 are forced to logic zero. The timing constraint t8 ≥ 10 ns ensures proper separation between reads, and BUSY falling edge signals completion of conversion before reads begin.

Does the AD7813YRZ require an external clock source?

No, the AD7813YRZ contains a fully integrated clock oscillator and requires no external clock components. All timing - including conversion, power-up, and BUSY assertion - is derived from this internal oscillator, simplifying system design and eliminating clock routing noise concerns. External timing is managed solely via the CONVST, CS, and RD control signals.

What is the purpose of the VREF pin on the AD7813YRZ?

The VREF pin on the AD7813YRZ sets the full-scale analog input range (0 V to VREF) and directly determines LSB size (VREF/1024). It accepts voltages from 1.2 V to VDD, enabling use of VDD itself as reference or external precision references. Proper decoupling (e.g., 0.1 µF ceramic + 10 µF tantalum) is required to maintain DC accuracy and dynamic performance.

Can the AD7813YRZ operate from a 3.3 V supply?

Yes, the AD7813YRZ is fully specified for operation from 2.7 V to 5.5 V, including standard 3.3 V systems. At VDD = 3.3 V, it maintains ±1 LSB relative accuracy, 58 dB SNR, and 10.5 mW typical power dissipation in normal operation. Logic thresholds (VINH ≥ 2.0 V, VINL ≤ 0.4 V) are compatible with 3.3 V CMOS/TTL interfaces without level shifting.

Is the AD7813YRZ pin-compatible with other packages in the AD7813 family?

Yes, the AD7813YRZ (TSSOP-16) shares identical pin numbering and function mapping with the AD7813YN (DIP-16) and AD7813YR (SOIC-16), per the AD7813 ordering guide and pin configuration diagram. All variants use the same 16-pin layout: VREF–VIN–GND–CONVST–CS–RD–BUSY–DB0–DB7–VDD, enabling direct PCB footprint interchangeability where package height and thermal requirements allow.