Analog Devices Inc. AD7813YRZ-REEL7

Overview

AD7813YRZ-REEL7 from Analog Devices is a 10-bit, 400 kSPS successive approximation ADC with on-chip track-and-hold, single-supply operation (2.7 V to 5.5 V), and an 8-bit parallel interface for microprocessor/DSP interfacing. It delivers ±1 LSB relative accuracy, 58 dB SNR at 30 kHz input, and automatic power-down mode consuming just 34.6 µW at 1 kSPS - ideal for battery-powered data acquisition systems.

For engineers reviewing the AD7813YRZ-REEL7 datasheet, AD7813YRZ-REEL7 pinout, AD7813YRZ-REEL7 application, or AD7813YRZ-REEL7 equivalent, key selection considerations include its dual-read 10-bit output protocol (MSB + LSB reads), 2.3 µs conversion time, VREF range of 1.2 V to VDD, BUSY-driven interrupt timing, and TSSOP-16 package compatibility with space-constrained industrial sensor nodes.

Technical Context

The AD7813YRZ-REEL7 implements a charge redistribution DAC architecture with internal clock oscillator and three-state TTL-compatible digital outputs. Its conversion logic is triggered by CONVST edge control, with BUSY signaling active conversion state and automatic power cycling between conversions in Mode 2.

It supports two operational modes: Mode 1 (continuous high-speed sampling ≥100 kSPS) and Mode 2 (automatic power-down between conversions), where power-up time is fixed at 1.5 µs and track/hold acquisition time is ≤100 ns. The 10-bit result is accessed via two sequential 8-bit reads - first read yields DB7–DB0 = MSBs, second read yields DB7–DB6 = LSBs with DB5–DB0 = 0.

Key Specifications

Pinout & Package

AD7813YRZ-REEL7 is housed in a 16-lead thin shrink small outline package (TSSOP), RoHS-compliant, with 0.65 mm lead pitch and 5 mm × 4.4 mm body size. Pin 1 is marked with a dot; pin numbering follows standard TSSOP convention (counterclockwise from mark).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 10-bit SAR ADC applications.

Compared with ADS7822U and MAX11131ETE+, the AD7813YRZ-REEL7 uniquely combines 10-bit accuracy, 400 kSPS, parallel 8-bit interface, integrated track-and-hold, and wide 2.7–5.5 V operation - making it optimal for legacy microcontroller-based systems requiring minimal firmware overhead and flexible supply/reference design.

Availability

AD7813YRZ-REEL7 is available at Aetrix Electronics and suitable for portable instrumentation, industrial sensor nodes, medical wearables, and test equipment requiring stable component supply, long-term manufacturability, and RoHS-compliant TSSOP packaging.

Supply support for AD7813YRZ-REEL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA, serving industrial, automotive, communications, and healthcare markets since 1965.

The AD7813YRZ-REEL7 belongs to Analog Devices' precision SAR ADC product line, designed specifically for microprocessor-centric data acquisition systems demanding low power, ease of interface, and guaranteed monotonicity in harsh electrical environments.

FAQ

What is the correct power-up sequence for the AD7813YRZ-REEL7?

The AD7813YRZ-REEL7 must have VDD applied before asserting any logic signals. CONVST must be held low during power-on; a rising edge on CONVST then initiates a 1.5 µs internal power-up pulse before conversion begins. This sequence ensures reliable initialization and avoids latch-up. Failure to hold CONVST low at power-on may cause undefined behavior or increased startup current in the AD7813YRZ-REEL7.

How do I read the full 10-bit result from the AD7813YRZ-REEL7?

The AD7813YRZ-REEL7 requires two consecutive 8-bit reads: first read retrieves DB7–DB0 = 8 MSBs; second read retrieves DB7–DB6 = 2 LSBs (with DB5–DB0 = 0). Both reads must occur after BUSY goes low and before the next CONVST falling edge. The combined 10-bit value is (MSB_byte << 2) | (LSB_byte >> 6). This dual-read protocol is mandatory for full resolution in the AD7813YRZ-REEL7.

Can the AD7813YRZ-REEL7 use VDD as its reference voltage?

Yes - the AD7813YRZ-REEL7 supports VREF = VDD, provided VDD is stable and well-decoupled (0.1 µF ceramic + 10 µF bulk). VREF range is specified from 1.2 V to VDD, so this configuration yields a 0 V to VDD analog input range. Using VDD as reference simplifies BOM and layout but trades off absolute accuracy for supply tracking; precision applications should use an external reference such as the ADR431 with the AD7813YRZ-REEL7.

What is the maximum source impedance allowed for the VIN input of the AD7813YRZ-REEL7?

The AD7813YRZ-REEL7 analog input has an internal multiplexer resistance of ~125 Ω and sampling capacitor of 3.5 pF. For ≤1/2 LSB settling within 100 ns acquisition time, source impedance should be ≤2 kΩ. Higher impedances increase settling time and degrade THD - especially above 10 kSPS. For best performance, buffer VIN with a low-output-impedance op amp (e.g., ADA4897) when driving the AD7813YRZ-REEL7 from high-Z sources like thermistors or photodiodes.

Does the AD7813YRZ-REEL7 support daisy-chained parallel interfacing?

No - the AD7813YRZ-REEL7 does not support daisy-chaining. Its parallel interface uses dedicated CS and RD lines per device; multiple AD7813YRZ-REEL7 units require individual chip selects and separate data bus connections or multiplexing logic. Unlike serial ADCs, the AD7813YRZ-REEL7's 8-bit bus is not designed for shared-bus arbitration or cascaded readout. For multi-channel systems, consider using one AD7813YRZ-REEL7 per channel with address decoding or selecting a multi-channel SAR ADC instead.