Analog Devices Inc. AD7821KRZ
- Part No.:
- AD7821KRZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 20-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AD7821KRZ.pdf
- Description:
- IC ADC 8BIT PIPELINED 20SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:180
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7821KRZ from Analog Devices is a high-speed, 8-bit LC2MOS analog-to-digital converter with integrated track-and-hold, 660 ns conversion time (WR-RD mode), ±1 LSB total unadjusted error over –40°C to +85°C, and dual-supply (±5 V) or single-supply (+5 V) operation for unipolar (0–5 V) or bipolar (±2.5 V) input ranges. It serves as a sampling front-end in real-time data acquisition systems requiring precise digitization of up to 100 kHz analog signals.
For engineers reviewing the AD7821KRZ datasheet, AD7821KRZ pinout, AD7821KRZ application, or AD7821KRZ equivalent, key selection considerations include its half-flash architecture eliminating external clock dependency, ratiometric reference support, 1 MHz maximum sample rate, and microprocessor-compatible control interface (CS, RD, WR, INT, RDY).
Technical Context
The AD7821KRZ implements a half-flash conversion architecture using two cascaded 4-bit flash ADCs - one for MSBs and one for LSBs - with internal DAC feedback and comparator-based sampling. Its sampling instant is precisely defined on the falling edge of WR (WR-RD mode) or RD (RD mode), enabling deterministic timing for DSP applications.
It features fully differential ratiometric reference inputs (VREF(+) and VREF(–)), supports both unipolar and bipolar configurations via VSS pin selection (0 V or –5 V), and delivers dynamic performance including 45 dB SNR and –50 dB THD at 99.85 kHz full-scale sine input with 500 kHz sampling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 8 bits - resolves 1 part in 256; 1 LSB = 19.53 mV for 5 V full-scale range |
| Conversion Time | 660 ns max (WR-RD mode) - enables ≥1 MHz sampling without external clock generation |
| Total Unadjusted Error | ±1 LSB max over –40°C to +85°C - guarantees monotonicity and no missing codes |
| Signal Bandwidth | 100 kHz max - supports direct digitization of full-scale 100 kHz sine waves without external track-and-hold |
| Power Dissipation | 50 mW typ at +5 V - low-power LC2MOS process enables embedded and portable designs |
| Supply Range | +5 V ±5 % (VDD), 0 V or –5 V ±5 % (VSS) - flexible unipolar/bipolar operation with single or dual rails |
| Dynamic Performance | 45 dB SNR, –50 dB THD at fIN = 99.85 kHz - validated for voice, echo cancellation, and adaptive filtering |
Pinout & Package
AD7821KRZ is housed in a 20-lead SOIC (Small Outline Integrated Circuit) package, RoHS-compliant and surface-mount compatible. Pin 19 (VSS) enables bipolar operation when tied to –5 V; grounding it configures unipolar +5 V operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (VIN) | Analog Input | Accepts differential input voltage between VREF(–) and VREF(+); supports 0–5 V or ±2.5 V ranges |
| 2–5, 14–17 (DB0–DB7) | Three-State Data Outputs | Latched 8-bit parallel output; high-impedance when CS or RD high - directly interfaces to 8-bit microprocessor data buses |
| 6 (WR/RDY) | Mode-Dependent Control/Status | In WR-RD mode: active-low write trigger; in RD mode: open-drain ready status output for WAIT-state interfacing |
| 7 (MODE) | Interface Mode Selection | High = WR-RD mode (external timing); low = RD mode (internal timeout) - sets fundamental bus protocol behavior |
| 8 (RD) | Read Strobe | Active-low signal enabling data output; in RD mode, initiates conversion and reads result in one cycle |
| 9 (INT) | Interrupt Output | Active-low pulse signaling conversion completion; resets on rising edge of CS or RD - synchronizes CPU read timing |
| 10 (GND) | Digital Ground Reference | Common return for digital logic; separate from analog ground in mixed-signal layout best practices |
| 11–12 (VREF(–), VREF(+)) | Differential Reference Inputs | Define zero and full-scale; enable ratiometric measurement - reference voltage variations cancel in ratio-based systems |
| 13 (CS) | Chip Select | Active-low enable for device addressing; required assertion before RD/WR access - prevents bus contention |
| 18 (OFL) | Overflow Flag | Active-low output indicating VIN > VREF(+) – ½ LSB - used to cascade multiple AD7821KRZ for higher resolution |
| 19 (VSS) | Negative Supply | Connect to 0 V for unipolar mode; –5 V for bipolar mode - determines input range polarity and rail configuration |
| 20 (VDD) | Positive Supply | +5 V ±5 % main power rail - powers analog core and digital interface; decoupling critical for SNR performance |
Key Features
| Feature | Design Value |
|---|---|
| No external clock required | Half-flash architecture eliminates CLK pin and timing generator - reduces BOM count and layout complexity |
| Built-in track-and-hold | Supports 1.6 V/µs input slew rate - digitizes 5 VPP, 100 kHz sine wave without external THA component |
| Ratiometric reference inputs | VREF(+) and VREF(–) accept variable spans - enables sensor bridge outputs to be measured with supply-voltage drift rejection |
| Microprocessor-compatible interface | Standard CS/RD/WR/INT signals - integrates directly with 68000, 8051, and Z80 families without glue logic |
| Overflow output (OFL) | Non-three-state flag for cascading - allows two AD7821KRZ to form a 12-bit system with shared control lines |
Applications
| Data Acquisition Front-End | DSP Signal Sampling |
|---|---|
|
Use Scenario: Real-time monitoring of industrial sensor outputs (e.g., pressure, temperature transducers) feeding into FPGA-based processing pipelines. IC Role / Device Role / Timing Role: ADC front-end capturing analog sensor data at ≤100 kHz with deterministic sampling edges synchronized to system clock. Use Value: 660 ns conversion time and precise WR-falling-edge sampling ensure minimal latency and jitter - critical for closed-loop control response. |
Use Scenario: Digitizing audio-band signals in voice recognition hardware where harmonic fidelity and SNR directly impact algorithm accuracy. IC Role / Device Role / Timing Role: High-fidelity sampling engine providing 45 dB SNR and –50 dB THD at 99.85 kHz - meets acoustical preprocessing requirements. Use Value: Built-in track-and-hold and ratiometric reference eliminate need for external precision components - reduces board area and calibration burden. |
| Embedded Test Equipment | Motor Control Feedback |
|
Use Scenario: Portable oscilloscope module digitizing analog waveforms for display and FFT analysis in handheld diagnostic tools. IC Role / Device Role / Timing Role: Standalone WR-RD operation (CS/RD grounded) enables compact, low-pin-count implementation with minimal external timing logic. Use Value: 1 MHz maximum sample rate and 50 mW power dissipation allow battery-powered operation with sufficient bandwidth for waveform capture. |
Use Scenario: Sampling current/voltage feedback in three-phase inverter drives for field-oriented control algorithms. IC Role / Device Role / Timing Role: Bipolar input mode (±2.5 V) digitizes bidirectional motor phase currents with ±1 LSB linearity across –40°C to +85°C. Use Value: Total unadjusted error ≤±1 LSB ensures accurate torque estimation without per-unit calibration - improves motor efficiency and thermal management. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 8-bit, high-speed ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7820KN | Slower conversion (1.36 µs), no built-in track-and-hold, 6.4 kHz signal bandwidth, single-supply only (no VSS pin) | Requires external THA for >10 kHz signals; limited to unipolar 0–5 V inputs | Select AD7821KRZ when 100 kHz bandwidth, bipolar operation, or reduced system component count is required. |
| MAX1112CPE+ | Serial SPI interface (vs. parallel), 2.5 µs conversion, 100 kSPS max, internal reference, 16-pin PDIP | Lower pin count but serial data transfer adds CPU overhead; no OFL or MODE pin flexibility | Choose AD7821KRZ for high-speed parallel bus integration, deterministic timing, or overflow-cascading capability. |
Compared with AD7820KN and MAX1112CPE+, the AD7821KRZ uniquely combines sub-microsecond conversion, integrated track-and-hold, bipolar/unipolar configurability, and parallel microprocessor interface - making it optimal for latency-sensitive, mixed-signal embedded systems where timing precision and analog fidelity are non-negotiable.
Availability
AD7821KRZ is available at Aetrix Electronics and suitable for industrial data acquisition, DSP signal sampling, embedded test equipment, and motor control feedback systems requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.
Supply support for AD7821KRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving industrial, automotive, communications, and healthcare markets since 1965.
The AD7821KRZ belongs to Analog Devices' legacy high-speed ADC product line, designed specifically for microprocessor-centric data acquisition systems demanding fast, accurate, and easy-to-interface digitization without external timing or support components.
FAQ
What is the maximum analog input frequency the AD7821KRZ can accurately digitize without an external track-and-hold?
The AD7821KRZ can accurately digitize full-scale sine-wave inputs up to 100 kHz without external track-and-hold circuitry, thanks to its inherent sampled-data comparator architecture and 1.6 V/µs slew rate capability. This is confirmed by specifications showing 45 dB SNR and –50 dB THD at 99.85 kHz input under 500 kHz sampling. The AD7821KRZ achieves this through internal timing that samples precisely on the falling edge of WR or RD, ensuring stability during conversion.
Does the AD7821KRZ require an external clock signal to operate?
No, the AD7821KRZ does not require an external clock signal. Its half-flash conversion architecture generates internal timing, eliminating the need for CLK input. Conversion is initiated by WR (in WR-RD mode) or RD (in RD mode), and timing parameters such as tCRD (700 ns max) and tACC1 (240 ns max) are internally controlled. This simplifies system design and reduces noise susceptibility compared to clock-dependent ADCs.
How does the MODE pin affect the AD7821KRZ's interface behavior?
The MODE pin selects between two distinct interface protocols: when MODE = 1 (high), the AD7821KRZ operates in WR-RD mode, using WR to start conversion and RD to read data; when MODE = 0 (low), it enters RD mode, where a single RD strobe initiates and completes conversion. Pin 6 functions as WR input in WR-RD mode and as open-drain RDY output in RD mode - this dual-role pin reduces pin count while supporting both wait-state and non-wait-state microprocessors.
Can the AD7821KRZ operate with a single +5 V supply in bipolar input mode?
No, the AD7821KRZ cannot operate in true bipolar input mode (±2.5 V) with only a single +5 V supply. Bipolar operation requires VSS = –5 V to establish the negative reference rail, as specified in the Absolute Maximum Ratings and General Description. However, the AD7821KRZ supports unipolar 0–5 V input with VSS = GND and +5 V on VDD - this configuration uses only one positive supply and is fully functional for single-ended applications.
What is the purpose of the OFL (overflow) pin on the AD7821KRZ?
The OFL pin on the AD7821KRZ is an active-low, non-three-state output that asserts when the analog input exceeds VREF(+) – ½ LSB, indicating overflow. It is designed for cascading multiple AD7821KRZ devices to achieve higher resolution - for example, two units can be configured so the MSB device's OFL triggers the LSB device's conversion, forming a 12-bit system. Unlike DBx outputs, OFL has no tri-state control and must be externally terminated.
AD7821KRZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 20-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- 1M
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 20-SOIC
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7821KRZ FAQ
1.How can I place an order for AD7821KRZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7821KRZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7821KRZ reliable?
The price and inventory of AD7821KRZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7821KRZ is usually 5 days.
3.What payment methods are accepted for AD7821KRZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7821KRZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7821KRZ?
AD7821KRZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7821KRZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7821KRZ?
For technical support, including AD7821KRZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7821KRZ requirements.
6.How does Aetrix verify that AD7821KRZ is sourced from the original manufacturer or authorized distributors?
All AD7821KRZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7821KRZ meets industry standards.
7.What is the process for return or replacement of AD7821KRZ?
All AD7821KRZ units undergo pre-shipment inspection (PSI). If there is an issue with AD7821KRZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7821KRZ part is unused and in its original packaging.
Return procedure for AD7821KRZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7821KRZ Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

