My Inquiry
My Account
Analog Devices Inc. AD7847AQ
- Part No.:
- AD7847AQ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Digital to Analog Converters (DAC)
- Package:
- 24-CDIP (0.300", 7.62mm)
- Datasheet:
-
AD7847AQ.pdf
- Description:
- IC DAC 12BIT V-OUT 24CDIP
- Quantity:
- Payment:
- Shipping:
Inventory:4,684
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7847AQ from Analog Devices is a dual 12-bit multiplying DAC with integrated output amplifiers, operating over –40°C to +85°C. It delivers ±1 LSB relative accuracy, 3 µs typical voltage settling time, and –95 dB channel-to-channel isolation. Used in precision programmable gain amplifiers and analog panning circuits requiring independent, synchronized digital control of two analog outputs.
For engineers reviewing the AD7847AQ datasheet, AD7847AQ pinout, AD7847AQ application, or AD7847AQ equivalent, this page provides verified specifications, package mapping to Cerdip Q-24, confirmed dual-DAC timing behavior (CSA/CSB edge-triggered write), and real-world design context for bipolar multiplication and simultaneous channel updating.
Technical Context
The AD7847AQ implements a segmented 12-bit architecture: two MSBs drive three current-steering switches, while ten LSBs feed an R-2R ladder. Each DAC features an internally compensated output amplifier with 0.2 Ω DC output impedance and ±10 V swing into 2 kΩ.
Its interface uses independent chip select inputs (CSA, CSB) and a common rising-edge-triggered WR signal-enabling asynchronous loading of DAC A, DAC B, or both latches. Unlike the AD7837, it requires no external feedback resistor (RFB is internal) and eliminates LDAC dependency for latch updates.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12 bits - supports 4096 discrete output levels per channel |
| Relative Accuracy | ±1 LSB max - ensures monotonic transfer function across full temperature range |
| Settling Time | 3 µs typ to ±1/2 LSB - enables high-speed waveform generation up to ~330 kHz update rate |
| Channel Isolation | –95 dB typ (VREFA→VOUTB) - prevents crosstalk in dual-channel signal processing |
| Full Power BW | 175 kHz typ - sustains full-scale sinusoidal output with <3% distortion |
| Supply Range | ±14.25 V to ±15.75 V - requires ±15 V ±5% rails; functional down to ±12 V with verified linearity |
| Digital Interface | Rising-edge WR with CSA/CSB - eliminates bus contention; supports memory-mapped 16-bit microprocessor interfacing |
Pinout & Package
AD7847AQ is housed in a 24-lead Cerdip (Q-24) package with hermetic ceramic sealing and gold-plated leads, rated for industrial temperature operation (–40°C to +85°C).
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | AGNDA | Analog ground reference for DAC A - must be tied locally to DGND at device pin to minimize noise coupling |
| 2–11 | DB0–DB11 | 12-bit parallel data bus (LSB to MSB) - accepts right-justified 12-bit words on single WR edge |
| 12 | WR | Write clock input - rising edge latches data to selected DAC latch (CSA or CSB low) |
| 13 | VOUTA | Analog output of DAC A - internally buffered, rail-to-rail capable with ±10 V swing into 2 kΩ |
| 14 | VREFA | Reference input for DAC A - accepts ac/dc signals up to ±10 V; defines full-scale output magnitude |
| 15 | AGNDA | Duplicate AGNDA pin - electrically identical to Pin 1; used for low-inductance ground return path |
| 16 | VDD | +15 V supply - decoupling required: 10 µF + 0.1 µF ceramic to DGND |
| 17 | VSS | –15 V supply - same decoupling requirement as VDD; floating VSS risks absolute max violation |
| 18 | AGNDB | Analog ground for DAC B - separate from AGNDA but must share common ground plane |
| 19 | VOUTB | Analog output of DAC B - fully independent of VOUTA; supports simultaneous or staggered updates |
| 10 | VREFB | Reference input for DAC B - may differ from VREFA; enables independent scaling per channel |
| 11 | DGND | Digital ground - tie to system digital ground plane; interconnect with AGNDA/AGNDB at single point |
| 12 | CSA | Chip select for DAC A - active-low; enables data loading to DAC A latch on WR rising edge |
| 13 | CSB | Chip select for DAC B - active-low; enables data loading to DAC B latch on WR rising edge |
Key Features
| Feature | Design Value |
|---|---|
| Independent dual DAC architecture | CSA and CSB allow selective or simultaneous update of each 12-bit DAC latch without shared control logic |
| Internal RFB amplifiers | Eliminates external feedback resistors - reduces board area, component count, and matching errors in PGA designs |
| 4-quadrant multiplication support | Offset binary coding enables true bipolar operation (±VIN × D/2048) with matched gain error ≤ ±4 LSB |
| Low digital feedthrough | 1 nV·s typ - minimizes transient injection during code changes, critical for low-noise audio and sensor excitation |
| High channel isolation | –95 dB typ between VREFA→VOUTB and VREFB→VOUTA - preserves signal integrity in dual-channel panning |
Applications
| Programmable Gain Amplifier (PGA) | Analog Audio Panning |
|---|---|
|
Use Scenario: Digitally controlled variable-gain stage in test instrumentation front-ends where gain must be reconfigured under software control without hardware modification. IC Role / Device Role / Timing Role: Dual DAC acts as two programmable feedback resistors (REQA, REQB) in cascaded op-amp stages; gain set by 12-bit codes NA and NB per Equation (3). Use Value: Achieves >70 dB dynamic range with <0.01% resistor ratio matching - superior to mechanical potentiometers or switched-resistor arrays. |
Use Scenario: Real-time stereo balance control in professional audio mixing consoles, where left/right channel power must remain constant while signal distribution shifts. IC Role / Device Role / Timing Role: VREFA and VREFB driven by common audio source; DAC A and DAC B loaded with two's-complement codes (NA + NB = 4096) to maintain constant total power. Use Value: Limits total power variation to ≤0.5 dB across full pan range - meets broadcast-grade audio fidelity requirements. |
| Bipolar Signal Synthesis | Industrial Process Control Output |
|
Use Scenario: Generating calibrated bipolar waveforms (±5 V, ±10 V) for actuator calibration in aerospace flight control systems. IC Role / Device Role / Timing Role: DAC configured in 4-quadrant mode using offset binary coding; VREF inputs driven by stable ±10 V references. Use Value: Delivers ±1 LSB linearity and –88 dB THD at 1 kHz - satisfies MIL-STD-704E analog stimulus accuracy requirements. |
Use Scenario: Providing isolated, digitally set analog outputs (4–20 mA or 0–10 V) for PLC I/O modules in factory automation. IC Role / Device Role / Timing Role: One DAC channel drives current-loop transmitter; second channel monitors loop voltage or provides redundancy. Use Value: Enables dual-output redundancy and real-time diagnostics without adding second IC - reduces BOM cost and PCB footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual 12-bit DAC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7847AR | Same core DAC architecture and specs, but in SOIC-24 package (R-24); lower thermal resistance, surface-mount only | Lacks hermetic Cerdip sealing - unsuitable for high-reliability, extended-temperature, or high-humidity environments | Select AD7847AR for cost-sensitive, space-constrained PCBs where industrial temp range suffices and moisture resistance is not critical |
| AD7837AQ | Same Q-24 package and temperature rating, but uses shared CS/WR/LDAC interface with 8-bit bus split; requires two writes per DAC update | Supports legacy 8-bit microcontrollers (8051, 6502); incompatible timing model - no direct replacement without firmware redesign | Choose AD7837AQ only when interfacing to 8-bit systems with limited address/data bus width and existing LDAC-synchronized update logic |
Compared with AD7847AR and AD7837AQ, the AD7847AQ uniquely combines hermetic Cerdip reliability, rising-edge WR simplicity, and independent dual-channel control - making it optimal for new designs demanding robustness and microprocessor compatibility without bus-width constraints.
Availability
AD7847AQ is available at Aetrix Electronics and suitable for programmable gain amplifiers, analog audio panning circuits, bipolar waveform synthesis, and industrial process control outputs requiring stable component supply across extended temperature ranges.
Supply support for AD7847AQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The AD7847AQ belongs to Analog Devices' precision DAC product line, engineered for applications demanding high linearity, low glitch energy, and dual-channel independence in industrial, instrumentation, and audio signal paths.
FAQ
What is the maximum recommended supply voltage for AD7847AQ?
The AD7847AQ has absolute maximum ratings of +17 V on VDD and –17 V on VSS. However, its specified operational range is ±14.25 V to ±15.75 V (±15 V ±5%). Operation at ±12 V is functional with verified linearity, but output swing and full-power bandwidth degrade. Always use 10 µF + 0.1 µF decoupling per supply rail referenced to DGND. Exceeding ±15.75 V risks permanent damage.
Does AD7847AQ require external feedback resistors?
No. Unlike the AD7837, the AD7847AQ integrates internal feedback resistors (RFB) directly into each output amplifier stage. This eliminates the need for external RFBA/RFBB components, simplifying PCB layout, reducing component count, and removing resistor matching errors that affect gain accuracy in programmable gain amplifier applications using the AD7847AQ.
How does the AD7847AQ handle simultaneous updates of both DAC channels?
The AD7847AQ updates both DAC A and DAC B simultaneously when CSA and CSB are both held low during a rising edge on WR. This behavior is explicitly defined in Table I of the datasheet. No LDAC signal is required - unlike the AD7837, the AD7847AQ uses edge-triggered latching, enabling true concurrent channel updates with deterministic timing and no additional control pin overhead.
What is the guaranteed monotonicity performance of AD7847AQ?
The AD7847AQ guarantees monotonicity across its full operating temperature range (–40°C to +85°C) due to its specified differential nonlinearity of ±1 LSB max. This ensures that every incremental increase in the 12-bit digital code produces a non-decreasing analog output - a critical requirement for closed-loop control systems and waveform generation where code transitions must never cause output reversal.
Can AD7847AQ operate with unipolar reference inputs while producing bipolar outputs?
Yes. When configured in offset binary mode (bipolar operation), the AD7847AQ accepts unipolar reference inputs (e.g., 0 V to +10 V on VREFA/VREFB) and generates bipolar analog outputs (±10 V) using internal sign inversion. Table IV confirms this behavior: code 100000000000 yields 0 V, while 000000000000 yields –VIN and 111111111111 yields +VIN × 2047/2048 - all with verified ±1 LSB relative accuracy in the AD7847AQ.
AD7847AQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-CDIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Number of Bits:
- 12
- Number of D/A Converters:
- 2
- Settling Time:
- 5µs
- Output Type:
- Voltage - Buffered
- Differential Output:
- No
- Data Interface:
- Parallel
- Reference Type:
- External
- Voltage - Supply, Analog:
- ±14.25V ~ 15.75V
- Voltage - Supply, Digital:
- -
- INL/DNL (LSB):
- ±1 (Max), ±1 (Max)
- Architecture:
- R-2R
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 24-CDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD7847AQ FAQ
1.How can I place an order for AD7847AQ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7847AQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7847AQ reliable?
The price and inventory of AD7847AQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7847AQ is usually 5 days.
3.What payment methods are accepted for AD7847AQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7847AQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7847AQ?
AD7847AQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7847AQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7847AQ?
For technical support, including AD7847AQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7847AQ requirements.
6.How does Aetrix verify that AD7847AQ is sourced from the original manufacturer or authorized distributors?
All AD7847AQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7847AQ meets industry standards.
7.What is the process for return or replacement of AD7847AQ?
All AD7847AQ units undergo pre-shipment inspection (PSI). If there is an issue with AD7847AQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7847AQ part is unused and in its original packaging.
Return procedure for AD7847AQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7847AQ Tags
-
MCP47A1T-A0E/LT
Microchip Technology
-
MCP4706A0T-E/CH
Microchip Technology
-
MCP4716A0T-E/MAY
Microchip Technology
-
MCP4716A0T-E/CH
Microchip Technology
-
MCP4726A0T-E/CH
Microchip Technology
-
MCP4725A0T-E/CH
Microchip Technology
-
MCP4725A1T-E/CH
Microchip Technology
-
MCP4725A2T-E/CH
Microchip Technology
-
MCP4726A1T-E/CH
Microchip Technology
-
MCP4726A3T-E/CH
Microchip Technology
-
MCP4726A2T-E/CH
Microchip Technology
-
MCP4726A0T-E/MAY
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
