Analog Devices Inc. AD7853LAN

Overview

AD7853LAN from Analog Devices is a 12-bit, pseudo-differential sampling ADC optimized for low-power operation at 100 kSPS with single 3 V to 5.5 V supply, 2.5 V internal reference, and SPI/QSPI/8051-compatible serial interface. It features system/self-calibration, automatic power-down after conversion (1.15 mW at 10 kSPS), and 24-lead PDIP package. Used in battery-powered medical instruments and portable data acquisition.

For engineers reviewing the AD7853LAN datasheet, AD7853LAN pinout, AD7853LAN application, or AD7853LAN equivalent, this page delivers verified specifications, calibrated DC accuracy (±1 LSB INL), timing-critical interface modes (Modes 1–5), real-world power dissipation (6.85 mW at 3.6 V), and validated alternative options for portable instrumentation designs.

Technical Context

The AD7853LAN implements a successive approximation register (SAR) architecture with integrated track-and-hold (500 ns acquisition), on-chip 2.5 V reference, and calibration memory. It supports unipolar (0 to VREF) and bipolar (±VREF/2) input ranges via AMODE pin control and uses external CREF1 (0.1 µF) and CREF2 (0.01 µF) capacitors for DAC charge redistribution.

Serial communication operates across five configurable interface modes selected by SM1/SM2 pins, with SCLK polarity controlled by POLARITY pin. Calibration is triggered by CAL pin rising edge or autocalibrated on power-up using 10 nF capacitor to DGND, retaining calibration data in sleep mode.

Key Specifications

Pinout & Package

AD7853LAN is housed in a 24-lead plastic dual-in-line package (N-24), 0.3 inch wide, with through-hole mounting and standard DIP thermal characteristics (θJA = 105°C/W).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit SAR ADC applications.

Compared with AD7853BN, AD7853LAN trades 0.5 LSB linearity for 70% lower power (6.85 mW vs. 20 mW); compared with ADS7822U, it integrates reference and calibration but occupies 3× more board area - selection depends on whether precision, power, or size is the dominant constraint.

Availability

AD7853LAN is available at Aetrix Electronics and suitable for battery-powered medical instruments, portable data loggers, and industrial field transmitters requiring stable component supply across extended production lifecycles.

Supply support for AD7853LAN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7853 family was designed for portable, low-power data acquisition systems requiring integrated calibration, flexible serial interfacing, and single-supply operation from 3 V batteries.

FAQ

What is the maximum sample rate supported by the AD7853LAN?

The AD7853LAN supports a maximum throughput rate of 100 kSPS, achieved with a 1.8 MHz master clock (CLKIN) at 0°C to +70°C or 1 MHz CLKIN at –40°C to +85°C. Conversion time is fixed at 10 µs (18 × tCLKIN), and the minimum inter-conversion interval must accommodate BUSY deassertion and 400 ns acquisition time before the next CONVST pulse. This rate is confirmed in the Ordering Guide and Timing Specifications tables for the L-version.

Does the AD7853LAN include an internal voltage reference?

Yes, the AD7853LAN includes an internal 2.5 V reference accessible at the REFIN/REFOUT pin, with 20 ppm/°C temperature coefficient and functional operation from 1.2 V to AVDD. It requires external 0.1 µF (CREF1) and 0.01 µF (CREF2) ceramic capacitors to AGND for stable DAC charge redistribution. The reference can be overdriven by an external source, enabling ratiometric or precision external reference configurations.

How does the AD7853LAN handle calibration?

The AD7853LAN supports both self-calibration (on-chip DAC and reference) and system calibration (external gain/offset errors), initiated by a rising edge on the CAL pin or automatically on power-up using a 10 nF capacitor from CAL to DGND. Calibration data is retained in sleep mode. Offset and gain calibration spans are ±0.05 × VREF and ±0.025 × VREF respectively, ensuring correction of typical sensor front-end errors without host intervention.

What serial interface protocols does the AD7853LAN support?

The AD7853LAN supports five configurable serial interface modes (via SM1/SM2 pins) compatible with SPI, QSPI, and 8051 microcontrollers. Modes include external clock (SCLK input), self-clocking (SCLK output), and frame-sync variants (SYNC as chip select or frame sync). POLARITY pin selects SCLK idle state (high/low), and all modes use 16-bit MSB-first data transfer on DIN/DOUT with programmable timing alignment.

What is the power consumption of the AD7853LAN in normal and sleep modes?

In normal operation at 3.6 V, the AD7853LAN draws 4.0 mA (6.85 mW); in full power-down sleep mode with external clock disabled, it consumes 1 µA typical (3.6 µW at 3.6 V). Partial power-down (PMGT1=1, PMGT0=1) draws 200 µA with external clock off. These values are measured per the Power Requirements table and reflect actual current draw under defined test conditions - not theoretical minima.