Analog Devices Inc. AD7854LARSZ

Overview

AD7854LARSZ from Analog Devices is a 12-bit, 100 kSPS pseudo-differential successive-approximation ADC operating from a single 3 V to 5.5 V supply, featuring on-chip 2.5 V reference, system/self-calibration, and parallel 12-bit interface in 28-lead SSOP package. It delivers 70 dB SNR, ±1 LSB INL, and 5.5 mW typical power at 3 V for battery-powered instrumentation and portable medical devices.

For engineers reviewing the AD7854LARSZ datasheet, AD7854LARSZ pinout, AD7854LARSZ application, or AD7854LARSZ equivalent, key selection factors include unipolar/bipolar input range configurability (via AMODE bit), automatic power-down (650 µW at 10 kSPS), flexible calibration modes, and compatibility with 8-bit or 16-bit microprocessor buses using HBEN-controlled byte access.

Technical Context

The AD7854LARSZ integrates a charge-redistribution DAC, track-and-hold amplifier with 500 ns acquisition time, and SAR conversion core. Its control register enables software-configurable power management (PMGT1/PMGT0), analog input mode (AMODE), and calibration type (CALMD/CALSLT/STCAL).

It supports two reference configurations: internal 2.5 V REFOUT (±20 ppm/°C) or external reference applied to REFIN/REFOUT (1.2 V to AVDD). Input ranges are programmable to 0–VREF (straight binary) or ±VREF/2 (twos complement), with AIN(+) and AIN(–) requiring proper biasing per mode.

Key Specifications

Pinout & Package

AD7854LARSZ is housed in a 28-lead SSOP (Shrink Small Outline Package) with 0.65 mm pitch, JEDEC MO-153 compliant, suitable for automated SMT assembly and high-density PCB layouts.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit SAR ADC applications.

Compared with AD7854LARSZ, AD7854ARZ offers double the throughput at higher power, while ADS7822U trades parallel simplicity for compactness and serial flexibility-neither is pin-compatible, but both serve overlapping measurement roles with distinct interface and supply constraints.

Availability

AD7854LARSZ is available at Aetrix Electronics and suitable for portable medical instrumentation, battery-powered data acquisition, industrial control loop monitoring, and pen-based computing interfaces requiring stable component supply across extended production lifecycles.

Supply support for AD7854LARSZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Wilmington, MA.

The AD7854LARSZ belongs to Analog Devices' precision SAR ADC product line, designed specifically for low-power, high-accuracy data acquisition in portable and embedded systems where supply voltage flexibility and calibration autonomy are critical.

FAQ

What is the maximum clock frequency supported by AD7854LARSZ?

The AD7854LARSZ supports a maximum CLKIN frequency of 1.8 MHz at 0°C to +70°C and 1 MHz at –40°C to +85°C. This clock sets the conversion time (18 × t_CLKIN) and calibration duration. Exceeding these limits may cause timing violations, incomplete conversions, or failed self-calibration sequences. Always verify clock stability and duty cycle (40/60 to 60/40) per the AD7854LARSZ datasheet timing specifications.

Does AD7854LARSZ require external reference components?

Yes, AD7854LARSZ requires two external capacitors: a 0.1 µF multilayer ceramic capacitor (CREF1) and a 0.01 µF ceramic disc capacitor (CREF2), both connected between their respective pins (CREF1, CREF2) and AGND. These stabilize the internal reference and DAC charge redistribution network. Omitting them degrades SNR, increases THD, and risks calibration instability-especially under dynamic load or temperature variation.

How does the HBEN pin affect data read operations on AD7854LARSZ?

When HBEN is low, AD7854LARSZ outputs all 12 data bits (DB0–DB11) simultaneously during a read cycle. When HBEN is high, only DB0–DB7 carry the upper byte (DB8–DB11), enabling compatibility with 8-bit microprocessor buses. For full 12-bit reads in 8-bit systems, two consecutive reads are required-one with HBEN high (upper nibble), one with HBEN low (lower byte)-and software must reconstruct the word correctly.

Can AD7854LARSZ operate with a 2.5 V external reference instead of its internal REFOUT?

Yes, AD7854LARSZ can use an external 2.5 V reference applied to the REFIN/REFOUT pin. The internal 2.5 V reference is disabled when an external source drives this pin above 2.3 V. External references must be low-noise (<10 µV RMS), well-decoupled, and capable of sourcing/sinking transient currents during conversion. Using an external reference improves absolute accuracy if higher initial tolerance or lower tempco than the internal 2.5 V (±20 ppm/°C) is required.

What calibration modes are supported by AD7854LARSZ and how are they initiated?

AD7854LARSZ supports self-calibration (CALMD = 0) and system calibration (CALMD = 1), each with four subtypes selected via CALSLT1/CALSLT0 bits and triggered by setting STCAL = 1 in the control register. Full self-calibration (default) corrects internal DAC, gain, and offset errors. System calibration applies corrections to external signal chain errors. Calibration time varies with CLKIN (e.g., ~31 ms for full self-cal at 1.8 MHz) and halts all conversions until BUSY returns low.