Analog Devices Inc. AD7870JPZ

Overview

AD7870JPZ from Analog Devices is a complete monolithic 12-bit sampling analog-to-digital converter (ADC) with integrated track-and-hold amplifier, laser-trimmed internal clock, on-chip 3 V buried Zener reference, and parallel/byte/serial digital interface. It delivers 100 kHz sampling rate, 72 dB SNR at 10 kHz input, ±3 V bipolar input range, and 57 ns data access time. It is used in precision data acquisition systems requiring high dynamic performance and microprocessor compatibility.

For engineers reviewing the AD7870JPZ datasheet, AD7870JPZ pinout, AD7870JPZ application, or AD7870JPZ equivalent, this page provides verified technical context, exact pin functions, real-world interface timing constraints, confirmed dynamic and dc accuracy specs, and validated alternative options for industrial and DSP-oriented signal chain design.

Technical Context

The AD7870JPZ implements a successive approximation register (SAR) architecture with a fast-settling voltage-output DAC, high-speed comparator, and integrated 2 μs track-and-hold amplifier. Its internal 3 V buried Zener reference is laser-trimmed to ±10 mV and supplies both DAC bias and bipolar offset correction.

Conversion is initiated asynchronously via CONVST rising edge or CS falling edge; the internal clock operates at ~2.5 MHz, yielding 6.5–9 μs conversion time. It supports three output formats-12-bit parallel, two 8-bit bytes, or serial-with mode selection controlled by the 12/8/CLK pin voltage level (−5 V, 0 V, or +5 V).

Key Specifications

Pinout & Package

AD7870JPZ is housed in a 24-pin, 0.3-inch-wide plastic dual-in-line package (PDIP), with pin 1 identified by notch or dot. The package is RoHS-compliant and rated for 0°C to +70°C (J-grade) operation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 12-bit sampling ADC applications.

Compared with AD7870JPZ, AD7875JPZ offers identical form-factor and timing but targets unipolar systems, while MAX195BCPP+ trades integration for resolution and requires redesign of analog front-end and digital interface.

Availability

AD7870JPZ is available at Aetrix Electronics and suitable for industrial data acquisition, test equipment, embedded control systems, and DSP signal chain designs requiring stable component supply, long-term lifecycle support, and guaranteed J-grade temperature performance.

Supply support for AD7870JPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide.

The AD7870JPZ belongs to Analog Devices' legacy LC2MOS precision ADC product line, engineered for high-speed, high-accuracy data acquisition in industrial and instrumentation applications where integration, stability, and ease of microprocessor interfacing are critical.

FAQ

What is the maximum analog input frequency the AD7870JPZ can accurately digitize?

The AD7870JPZ supports full-power signal conversion up to 50 kHz, as defined by its 100 kHz sampling rate and Nyquist criterion. Its 2 μs track-and-hold amplifier acquires input signals to 12-bit accuracy within that window, and its 72 dB SNR at 10 kHz confirms usable bandwidth well into the audio band. For signals above 50 kHz, aliasing occurs unless antialiasing filtering is applied prior to VIN.

Does the AD7870JPZ require external components to operate?

No - the AD7870JPZ is a complete ADC requiring only power supply decoupling capacitors: 0.1 μF ceramic and 10 μF tantalum on both VDD and VSS, placed near their respective pins. It integrates a laser-trimmed clock, 3 V reference, and track-and-hold amplifier, eliminating need for external timing crystals, reference ICs, or sample-hold circuits.

How does the 12/8/CLK pin configure the AD7870JPZ interface mode?

The 12/8/CLK pin selects interface format via voltage level: +5 V enables 12-bit parallel output only; 0 V enables byte or serial mode with gated SCLK; −5 V enables byte or serial mode with continuous SCLK. This single pin determines DB[11:0] behavior, HBEN function, and serial clock gating - no register writes or firmware configuration needed.

What is the purpose of the BUSY/INT pin on the AD7870JPZ?

The BUSY/INT pin is an open-drain output that goes low at conversion start and returns high upon completion. It serves dual roles: as BUSY indicator for polling-based firmware, and as INT signal for interrupt-driven sampling. An external pull-up resistor is required; timing t5 (RD to INT delay) is guaranteed ≤70 ns, enabling tight synchronization with host processor reads.

Can the AD7870JPZ reference be used to drive external circuitry?

Yes - the REF OUT pin delivers a stable 3.00 V ±10 mV (±35 ppm/°C for J-grade) and can source up to 500 μA. However, total capacitance on REF OUT must not exceed 50 pF. For external use, Analog Devices recommends series 200 Ω isolation plus parallel 10 μF tantalum and 0.1 μF ceramic decoupling to suppress switching noise from the internal DAC and comparator.