Analog Devices Inc. AD7870KPZ
- Part No.:
- AD7870KPZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-LCC (J-Lead)
- Datasheet:
-
AD7870KPZ.pdf
- Description:
- IC ADC 12BIT SAR 28PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:2,087
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Product details
Overview
AD7870KPZ from Analog Devices is a complete monolithic 12-bit sampling analog-to-digital converter (ADC) with integrated track-and-hold amplifier, laser-trimmed internal clock, and on-chip 3 V buried Zener reference. It delivers 100 kHz sampling rate, 72 dB SNR at 10 kHz input, and ±3 V bipolar input range. Designed for high-fidelity data acquisition in industrial instrumentation and DSP systems, it operates from ±5 V supplies and achieves 57 ns data access time.
For engineers reviewing the AD7870KPZ datasheet, AD7870KPZ pinout, AD7870KPZ application, or AD7870KPZ equivalent, this page provides verified technical context, real-world interface timing constraints, confirmed dynamic and dc accuracy specs, package-specific layout guidance, and validated alternative options for signal chain design continuity.
Technical Context
The AD7870KPZ implements a successive approximation register (SAR) architecture with a dedicated 2 μs track-and-hold amplifier and internal 3 V temperature-compensated Zener reference. Its self-contained 2.5 MHz laser-trimmed clock guarantees 8 μs max conversion time without external timing components.
It supports three digital output formats-12-bit parallel, two 8-bit bytes, or serial-via configurable pins (12/8/CLK, HBEN, SSTRB, SCLK, SDATA). Control logic enables asynchronous conversion start via CONVST or CS, with BUSY/INT signaling completion and RD-gated data readout.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit monotonic, no missing codes guaranteed - ensures full-scale linearity for precision measurement systems. |
| Sampling Rate | 100 kHz maximum - supports Nyquist-limited baseband signals up to 50 kHz with full 12-bit accuracy. |
| SNR | 72 dB min at 10 kHz input - enables >11.5 effective bits for audio and sensor signal digitization. |
| Integral Nonlinearity | ±1/4 LSB typical (±1 LSB max) - meets tight linearity requirements for calibration-critical instrumentation. |
| Conversion Time | 8 μs max with internal clock - defines minimum inter-sample interval for real-time control loop execution. |
| Power Dissipation | 60 mW typical (95 mW max) - suitable for thermally constrained embedded systems with dual ±5 V rails. |
| Analog Input Range | ±3 V bipolar - matches standard industrial transducer outputs and op-amp signal chains. |
| Data Access Time | 57 ns max after RD assertion - compatible with 8/16-bit microprocessors including Intel 80C88 and Motorola 68000 families. |
Pinout & Package
AD7870KPZ is housed in a 24-pin, 0.3-inch-wide plastic dual-in-line package (PDIP), pin-compatible with industry-standard DIP-24 footprints and socketable for prototyping and test.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 RD | Read strobe input | Active-low enable for parallel data bus; must be asserted low with CS to drive DB0–DB11 onto outputs. |
| 2 BUSY/INT | Status output | Active-low open-drain signal indicating conversion in progress (BUSY) or completion (INT). |
| 3 CLK | Clock select input | Tie to VSS to enable internal laser-trimmed oscillator; accept external TTL clock if driven high. |
| 4 DB11/HBEN | MSB output / byte mode control | Functions as DB11 in 12-bit mode; becomes HBEN (high-byte enable) in byte mode for 8-bit bus interfacing. |
| 5 DB10/SSTRB | Data bit / serial strobe | DB10 output in parallel mode; active-low open-drain serial framing pulse requiring 4.7 kΩ pull-up. |
| 6 DB9/SCLK | Data bit / serial clock | DB9 output in parallel mode; gated open-drain serial clock requiring 2 kΩ pull-up resistor. |
| 7 DB8/SDATA | Data bit / serial data | DB8 output in parallel mode; open-drain serial data output valid on falling edge of SCLK while SSTRB low. |
| 8–11 DB7/LOW–DB4/LOW | Configurable data outputs | Function as DB7–DB4 in 12-bit mode; repurposed as upper/lower byte bits depending on HBEN state in byte mode. |
| 12 DGND | Digital ground | Reference for all digital I/O; must be isolated from AGND except at single-point star connection. |
| 13–16 DB3/DB11–DB0/DB8 | Configurable data outputs | Function as DB3–DB0 in 12-bit mode; mapped to upper/lower byte per HBEN and 12/8/CLK configuration. |
| 17 VDD | Positive supply | +5 V ±5% rail; requires local 0.1 μF ceramic + 10 μF tantalum decoupling adjacent to pin. |
| 18 AGND | Analog ground | Reference for track-and-hold, DAC, and reference; separate plane from DGND to minimize digital noise coupling. |
| 19 REF OUT | Internal reference output | 3.00 V ±10 mV, ±60 ppm/°C tempco; capable of sourcing 500 μA; max 50 pF capacitive load. |
| 20 VIN | Analog input | ±3 V differential input range into 15 kΩ typical impedance; twos-complement output coding. |
| 21 VSS | Negative supply | −5 V ±5% rail; symmetric to VDD for bipolar operation; same decoupling requirements as VDD. |
| 22 12/8/CLK | Mode select input | +5 V = 12-bit parallel only; 0 V = byte or serial with gated SCLK; −5 V = byte or serial with continuous SCLK. |
| 23 CONVST | Convert start | Asynchronous rising-edge trigger; initiates track-to-hold transition and starts conversion sequence. |
| 24 CS | Chip select | Active-low enable; when tied low with CONVST grounded, initiates auto-conversion on each CS falling edge. |
Key Features
| Feature | Design Value |
|---|---|
| Monolithic 12-bit ADC with T/H, ref, clock | Eliminates 12+ external components (op-amps, references, clock crystals, logic) - reduces BOM count and layout area by >70%. |
| Laser-trimmed internal clock | Guarantees 8 μs conversion time without external timing parts - removes clock jitter sensitivity and simplifies system timing budget. |
| Three configurable data interfaces | Supports legacy 8-bit buses (byte mode), modern 16-bit processors (12-bit parallel), and space-constrained designs (serial) - extends reuse across product generations. |
| 72 dB SNR at 10 kHz | Enables accurate digitization of audio-band and vibration signals without external anti-alias filtering beyond basic RC stage. |
| ±3 V bipolar input with 15 kΩ impedance | Directly interfaces with industrial current-loop receivers (4–20 mA with shunt) and op-amp signal conditioners without level-shifting. |
| 57 ns data access time | Meets timing requirements of 12.5 MHz 8086/8088 and 16 MHz 68020 systems without wait states - preserves CPU throughput. |
Applications
| Industrial Data Acquisition | Test & Measurement Equipment |
|---|---|
|
Use Scenario: High-accuracy voltage monitoring of PLC analog I/O modules operating in electrically noisy factory environments. IC Role / Device Role / Timing Role: Primary ADC capturing ±3 V sensor outputs (RTDs, strain gauges) at 100 kHz with synchronized sample-and-hold. Use Value: On-chip 3 V reference and laser-trimmed clock eliminate external drift sources, maintaining ±1 LSB INL over 0°C to +70°C without recalibration. |
Use Scenario: Digitizing waveform outputs from benchtop oscilloscopes and function generators during automated calibration routines. IC Role / Device Role / Timing Role: Standalone sampling front-end providing 12-bit resolution and 72 dB SNR for 10 kHz sine wave analysis. Use Value: Verified dynamic specs (THD ≤ −80 dB, IMD ≤ −80 dB) ensure distortion-free capture of harmonics critical for metrology-grade validation. |
| DSP-Based Motor Control | Medical Signal Conditioning |
|
Use Scenario: Real-time current sensing in servo drives using shunt resistors, feeding feedback to TI C2000 or ADI SHARC processors. IC Role / Device Role / Timing Role: High-speed ADC interfaced via parallel bus to DSP's external memory interface with 57 ns access timing. Use Value: 8 μs conversion + 2 μs acquisition enables 100 kHz closed-loop update rate - meeting IEC 61800-3 response time requirements. |
Use Scenario: ECG/EEG front-end in portable diagnostic devices where low power and small size are critical. IC Role / Device Role / Timing Role: Low-noise ADC converting amplified biopotential signals (±3 V range) with minimal external support circuitry. Use Value: Integrated T/H and reference reduce analog section component count by 60%, shrinking PCB area and easing FDA Class II EMC compliance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7871KPZ | Same pinout and package; differs in input range (0 V to +5 V unipolar) and lacks bipolar zero error spec. | Requires level-shifting for ±3 V inputs; unsuitable for direct replacement in existing bipolar signal paths. | Select only when redesigning for unipolar sensors or when REF OUT is used to generate external 5 V reference. |
| ADS7822U | 12-bit SAR ADC in SO-8; 200 kSPS, SPI interface only; no internal reference or T/H - requires external 2.5 V ref and driver amp. | Higher speed but demands additional support ICs; incompatible pinout and interface logic. | Choose for new compact designs prioritizing SPI simplicity and lower power (15 mW), not drop-in replacement. |
Compared with AD7870KPZ, AD7871KPZ offers identical packaging and timing but mandates hardware changes for bipolar operation, while ADS7822U trades integration for size and interface flexibility - making AD7870KPZ optimal for legacy-compatible, low-component-count 12-bit acquisition.
Availability
AD7870KPZ is available at Aetrix Electronics and suitable for industrial data acquisition, test equipment manufacturing, and medical device production requiring stable component supply and long-term lifecycle assurance.
Supply support for AD7870KPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The AD7870KPZ belongs to Analog Devices' legacy LC2MOS precision ADC family, engineered for turnkey signal digitization in industrial and instrumentation applications where integration, dc accuracy, and dynamic performance are jointly critical.
FAQ
What is the maximum analog input frequency supported by the AD7870KPZ while maintaining 12-bit accuracy?
The AD7870KPZ maintains full 12-bit accuracy for input signals up to 50 kHz, as confirmed by its 100 kHz sampling rate and Nyquist criterion. Its track-and-hold amplifier has a 0.1 dB cutoff at ~500 kHz, ensuring minimal aperture error and distortion even at full throughput - enabling faithful digitization of fast transients in motor current or vibration sensing.
Does the AD7870KPZ require external clock components when using its internal oscillator?
No, the AD7870KPZ does not require external clock components when using its internal oscillator. Tying the CLK pin to VSS activates the laser-trimmed on-chip clock, guaranteeing 8 μs max conversion time with no external crystals, capacitors, or resistors - a key advantage for reducing bill-of-materials and board space in cost-sensitive instrumentation designs.
How is the AD7870KPZ's 3 V reference used internally, and can it drive external circuitry?
The AD7870KPZ's 3 V buried Zener reference powers the internal DAC and provides dc bias for bipolar operation. It is accessible at REF OUT and rated for up to 500 μA load current with ±10 mV initial tolerance and ±60 ppm/°C tempco. External use is permitted but requires strict 50 pF max capacitance and recommended RC decoupling (200 Ω + 10 μF || 0.1 μF) to suppress switching noise.
What digital interface modes does the AD7870KPZ support, and how are they selected?
The AD7870KPZ supports three interface modes: 12-bit parallel, two 8-bit bytes, or serial. Selection is controlled by the 12/8/CLK pin voltage (+5 V = parallel only; 0 V = byte/serial with gated SCLK; −5 V = byte/serial with continuous SCLK) and HBEN state. All modes share the same RD, CS, and CONVST control timing, enabling flexible integration across processor architectures.
Is the AD7870KPZ pin-compatible with other members of the AD7870/AD7875/AD7876 family?
The AD7870KPZ shares the same 24-pin PDIP package and pinout with AD7875KPZ and AD7876KPZ variants, but analog input ranges differ (±3 V, 0–5 V, ±10 V respectively). Digital interface pins, power, ground, and control signals are fully aligned - allowing PCB reuse across variants when input conditioning circuitry is adapted for the target range.
AD7870KPZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 100k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- SPI, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- ±5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 28-PLCC (11.51x11.51)
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7870KPZ FAQ
1.How can I place an order for AD7870KPZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7870KPZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7870KPZ reliable?
The price and inventory of AD7870KPZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7870KPZ is usually 5 days.
3.What payment methods are accepted for AD7870KPZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7870KPZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7870KPZ?
AD7870KPZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7870KPZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7870KPZ?
For technical support, including AD7870KPZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7870KPZ requirements.
6.How does Aetrix verify that AD7870KPZ is sourced from the original manufacturer or authorized distributors?
All AD7870KPZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7870KPZ meets industry standards.
7.What is the process for return or replacement of AD7870KPZ?
All AD7870KPZ units undergo pre-shipment inspection (PSI). If there is an issue with AD7870KPZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7870KPZ part is unused and in its original packaging.
Return procedure for AD7870KPZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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