Analog Devices Inc. AD7871TQ
- Part No.:
- AD7871TQ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-CDIP (0.600", 15.24mm)
- Datasheet:
-
AD7871TQ.pdf
- Description:
- IC ADC 14BIT SAR 28CDIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,480
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7871TQ from Analog Devices is a complete monolithic 14-bit successive approximation analog-to-digital converter (ADC) with integrated track-and-hold amplifier, 3 V buried Zener reference, and laser-trimmed internal clock. It delivers 83 kSPS throughput, 80 dB SNR at 10 kHz, 57 ns data access time, and operates from ±5 V supplies with ±3 V bipolar analog input range. It is used in high-speed DSP servo control and spectrum analysis systems requiring stable dc accuracy and dynamic performance.
For engineers reviewing the AD7871TQ datasheet, AD7871TQ pinout, AD7871TQ application, or AD7871TQ equivalent, this page provides verified technical context, real-world interface configurations (parallel/byte/serial), confirmed timing constraints (t6 = 70 ns max data access), thermal operating limits (−55°C to +125°C), and validated alternative options for signal acquisition designs.
Technical Context
The AD7871TQ implements a self-contained SAR architecture with on-chip 3 V temperature-compensated Zener reference and internal 2 MHz oscillator-no external timing components required. Its track-and-hold acquires signals to 14-bit accuracy in ≤2 μs, enabling full-scale conversion of 41.5 kHz sine waves while maintaining 80 dB SNR.
It supports three configurable output modes via the 14/8/CLK pin: 14-bit parallel (DB0–DB13), two 8-bit bytes (HBEN-controlled), or 14-bit serial (SSTRB/SCLK/SDATA). Logic interfaces comply with TTL levels (VINH ≥ 2.4 V, VINL ≤ 0.8 V), and BUSY/INT provides asynchronous conversion status signaling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit monotonic, no missing codes guaranteed-enables precise amplitude discrimination in 366 μV LSB steps over ±3 V input. |
| Throughput Rate | 83 kSPS maximum-supports real-time sampling of signals up to 41.5 kHz per Nyquist criterion. |
| SNR @ 10 kHz | 77 dB min (T version)-measured including distortion and noise; sufficient for 12.5 ENOB in spectral analysis. |
| Data Access Time | 70 ns max after RD assertion-enables direct interfacing with fast microprocessors without wait states. |
| Power Dissipation | 50 mW typical at ±5 V-achieved via LC2MOS process; reduces thermal load in dense mixed-signal PCB layouts. |
| Analog Input Range | ±3 V bipolar-compatible with standard op-amp signal conditioning stages and industrial sensor outputs. |
| Operating Temperature | −55°C to +125°C-qualified for extended-range military and aerospace embedded applications. |
Pinout & Package
AD7871TQ is housed in a 28-pin CERDIP package (hermetically sealed ceramic dual in-line) with 0.600-inch body width and 0.100-inch lead pitch. Pin 24 is NC; all digital I/O pins are three-state controlled by CS and RD; AGND and DGND are separate for analog/digital noise isolation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CONVST (1) | Asynchronous convert start | Rising-edge-triggered hold command-decouples sampling timing from system clock domain for jitter-critical acquisition. |
| CS (2) | Chip select enable | Active-low gate for data bus drivers-must remain high during CONVST pulse to avoid conflict. |
| RD (3) | Data read strobe | Active-low signal enabling DB0–DB13 outputs; t6 = 70 ns max delay defines minimum processor read cycle. |
| BUSY/INT (4) | Status indicator | Open-drain active-low output-asserted during conversion, deasserted when data is valid and ready to read. |
| CLK (5) | External clock input | TTL-compatible; tied to VSS to enable internal 2 MHz oscillator-eliminates external crystal or clock generator. |
| DB13/HBEN (6) | MSB output / byte enable | Configurable: DB13 in 14-bit mode; HBEN logic input in byte mode-controls upper/lower byte selection on DB0–DB7. |
| 14/8/CLK (28) | Mode configuration | +5 V = 14-bit parallel only; 0 V = byte + serial with gated SCLK; −5 V = byte + serial with continuous SCLK. |
| VIN (26) | Analog input | ±3 V differential input referenced to AGND-15 kΩ input impedance requires buffered drive for low-distortion performance. |
| REFOUT (25) | Reference output | 3.00 V ±10 mV, 500 μA load capability-supplies external circuitry; decoupled via 10 nF capacitor to AGND at CREF (23). |
Key Features
| Feature | Design Value |
|---|---|
| Complete monolithic ADC | No external DAC, reference, or clock components needed-reduces BOM count and layout area in compact data loggers. |
| Three configurable data interfaces | Supports 16-bit parallel buses (14-bit word), 8-bit microcontrollers (two-byte mode), and serial links (SSTRB/SCLK/SDATA)-maximizes host compatibility. |
| Internal 2 MHz clock | Laser-trimmed oscillator eliminates timing component sourcing, calibration, and board space-critical for rapid prototyping. |
| Bipolar ±3 V input range | Direct interface with industrial transducers and op-amp front-ends without level-shifting-simplifies signal chain design. |
| LC2MOS process technology | Enables low power (50 mW typ) and high speed (83 kSPS) in same die-avoids trade-offs between throughput and thermal management. |
Applications
| Digital Signal Processing | High-Speed Modems |
|---|---|
Use Scenario: Real-time FFT-based spectral monitoring in field-deployable RF receivers. IC Role / Device Role / Timing Role: Primary ADC capturing baseband I/Q samples at 83 kSPS with <70 ns read latency for DMA-driven buffer transfers. Use Value: 80 dB SNR ensures clean 12.5-bit effective resolution across 0–40 kHz band, enabling accurate adjacent-channel power ratio (ACPR) measurement. |
Use Scenario: Analog front-end digitization in V.34/V.90 modem chipsets for telephone line signal recovery. IC Role / Device Role / Timing Role: High-fidelity sampling of 3.4 kHz voiceband signals with precise timing control via CONVST edge triggering. Use Value: Twos-complement coding and ±3 V input range match telecom line driver output swing, eliminating external offset adjustment. |
| Spectrum Analysis | DSP Servo Control |
Use Scenario: Portable handheld spectrum analyzers requiring battery-efficient, wide-dynamic-range acquisition. IC Role / Device Role / Timing Role: Core ADC in swept-tuned receiver architecture, synchronized to local oscillator ramp via CONVST. Use Value: 2 μs track/hold acquisition enables accurate capture of transient spectral events without aperture uncertainty degradation. |
Use Scenario: Closed-loop position feedback in industrial CNC motion controllers using resolver or LVDT sensors. IC Role / Device Role / Timing Role: Bipolar ADC digitizing conditioned ±3 V error voltage from servo amplifier for PID computation. Use Value: Integral nonlinearity ≤±2 LSB (T version) ensures sub-arcminute angular resolution stability over −55°C to +125°C ambient. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 14-bit sampling ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7872TQ | Serial-output-only variant; 16-pin CERDIP; lacks parallel/byte interface; identical core ADC, reference, and timing specs. | Used where microcontroller has dedicated SPI peripheral but limited GPIO; saves PCB area vs. 28-pin footprint. | Select AD7872TQ only if serial interface suffices and board space is constrained-no pin compatibility with AD7871TQ. |
| ADS8320U | 16-bit, 100 kSPS, SPI-only, single-supply (+5 V), no internal reference-requires external REF and level-shifting for ±3 V inputs. | Preferred for higher-resolution applications where SNR > 85 dB is mandatory and external reference calibration is acceptable. | Choose ADS8320U when 16-bit resolution outweighs integration benefits; AD7871TQ remains optimal for drop-in replacement in legacy ±5 V systems. |
Compared with AD7872TQ, AD7871TQ offers flexible parallel/serial interface and larger package for easier probing; compared with ADS8320U, it trades 2-bit resolution for full integration, lower power, and bipolar input readiness-making it superior for ruggedized, space-constrained, ±5 V embedded systems.
Availability
AD7871TQ is available at Aetrix Electronics and suitable for digital signal processing, high-speed modems, and spectrum analysis applications requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AD7871TQ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global semiconductor leader specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision measurement and control.
The AD7871TQ belongs to the AD7871/AD7872 family of complete sampling ADCs designed for applications demanding integrated timing, reference, and interface logic in harsh environments-from aerospace telemetry to industrial automation.
FAQ
What is the maximum analog input frequency supported by the AD7871TQ?
The AD7871TQ can accurately convert full-power sine wave inputs up to 41.5 kHz while maintaining specified dynamic performance, including 77 dB SNR. This limit arises from the combination of 83 kSPS throughput and the track-and-hold amplifier's 500 kHz 0.1 dB bandwidth-ensuring faithful digitization without aliasing or slew-induced distortion in the AD7871TQ signal path.
Does the AD7871TQ require external clock components?
No, the AD7871TQ features a self-contained, laser-trimmed internal 2 MHz clock oscillator. Tying the CLK pin (5) to VSS enables this internal timing source, eliminating need for crystals, oscillators, or RC networks. External clocks are optional and accepted via the CLK pin when system-level synchronization is required-making the AD7871TQ truly complete with no external timing dependencies.
How does the 14/8/CLK pin configure data output formats on the AD7871TQ?
The 14/8/CLK pin (28) selects among three AD7871TQ output modes: +5 V enables 14-bit parallel only (DB0–DB13); 0 V enables both byte-mode (HBEN-controlled DB0–DB7) and serial mode (SSTRB/SCLK/SDATA) with gated SCLK; −5 V enables same dual-mode output but with continuous SCLK. This single pin determines interface topology without firmware changes-critical for hardware-flexible system design.
What is the purpose of the CREF pin on the AD7871TQ?
The CREF pin (23) is the dedicated decoupling node for the AD7871TQ's internal 3 V buried Zener reference. A 10 nF capacitor must be placed between CREF and AGND to minimize reference noise and ensure stable DAC operation. This external capacitor is mandatory-not optional-as its absence degrades SNR and increases integral nonlinearity beyond datasheet limits in the AD7871TQ.
Can the AD7871TQ operate with unipolar input signals?
Yes, the AD7871TQ supports unipolar operation using its internal REFOUT (25) to bias the analog input stage. By applying REFOUT to an external summing amplifier (e.g., Figure 14), the input range shifts from ±3 V to 0 V–6 V or scaled ranges like 0 V–5 V. The output remains twos-complement but can be converted to straight binary by inverting the MSB-enabling seamless integration into unipolar control loops without external level shifters in the AD7871TQ signal chain.
AD7871TQ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-CDIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 83k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- SPI, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- ±5V
- Features:
- -
- Operating Temperature:
- -55°C ~ 125°C
- Supplier Device Package:
- 28-CDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD7871TQ FAQ
1.How can I place an order for AD7871TQ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7871TQ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7871TQ reliable?
The price and inventory of AD7871TQ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7871TQ is usually 5 days.
3.What payment methods are accepted for AD7871TQ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7871TQ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7871TQ?
AD7871TQ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7871TQ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7871TQ?
For technical support, including AD7871TQ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7871TQ requirements.
6.How does Aetrix verify that AD7871TQ is sourced from the original manufacturer or authorized distributors?
All AD7871TQ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7871TQ meets industry standards.
7.What is the process for return or replacement of AD7871TQ?
All AD7871TQ units undergo pre-shipment inspection (PSI). If there is an issue with AD7871TQ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7871TQ part is unused and in its original packaging.
Return procedure for AD7871TQ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7871TQ Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

