Analog Devices Inc. AD7872BRZ

Overview

AD7872BRZ from Analog Devices is a complete monolithic 14-bit successive approximation analog-to-digital converter (ADC) with integrated track-and-hold amplifier, 3 V buried Zener reference, and serial-only digital interface. It operates from ±5 V supplies, accepts bipolar ±3 V analog inputs, achieves 83 kSPS throughput, delivers 80 dB SNR at 10 kHz, and features 57 ns data access time. It is used in high-speed DSP servo control and spectrum analysis systems requiring precise timing and low-noise conversion.

For engineers reviewing the AD7872BRZ datasheet, AD7872BRZ pinout, AD7872BRZ application, or AD7872BRZ equivalent, this page provides verified technical context, real-world interface constraints, confirmed dynamic and DC specifications, package-validated terminal functions, and two rigorously validated alternative parts for serial-output 14-bit sampling ADCs in industrial and embedded signal acquisition.

Technical Context

The AD7872BRZ implements a self-contained LC2MOS SAR architecture with laser-trimmed internal 2 MHz clock, eliminating external timing components. Its track-and-hold acquires ±3 V signals to 14-bit accuracy in ≤2 μs, and its serial interface uses open-drain SCLK and SDATA outputs with required external pull-ups (2 kΩ on SCLK, 4.7 kΩ on SSTRB/SDATA).

All logic inputs accept TTL-compatible levels (VINH ≥ 2.4 V, VINL ≤ 0.8 V), and outputs drive 1.6 mA sink / 200 µA source loads. The internal 3 V reference (REFOUT) supports ≤500 µA external load and requires a 10 nF capacitor at CREF to AGND for noise suppression - no external reference or calibration circuitry is needed.

Key Specifications

Pinout & Package

AD7872BRZ is housed in a 16-pin SOIC package (body width 3.9 mm, lead pitch 1.27 mm), RoHS-compliant, with standard JEDEC MS-012AC outline. Pin 1 is CONTROL; pins 7 and 10 are NC; dual VDD pins (9 and 16) must be connected externally.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar serial-output 14-bit sampling ADC applications.

Compared with ADS8320UB and MAX1166BCAP+, the AD7872BRZ uniquely integrates a bipolar ±3 V input path, self-clocked operation, and on-chip 3 V reference in a serial-output 14-bit ADC - making it optimal for industrial DAQ systems requiring minimal external components and guaranteed 80 dB SNR at 10 kHz without supply or reference redesign.

Availability

AD7872BRZ is available at Aetrix Electronics and suitable for digital signal processing, high-speed modems, spectrum analysis, DSP servo control, and industrial data acquisition requiring stable component supply over extended temperature ranges (−40°C to +85°C).

Supply support for AD7872BRZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide.

The AD7872BRZ belongs to the AD7871/AD7872 family of complete sampling ADCs designed specifically for demanding real-time signal acquisition in DSP-based systems where integration, dynamic performance, and ease of interface are critical.

FAQ

What is the maximum analog input frequency supported by the AD7872BRZ?

The AD7872BRZ supports full-power analog input signals up to 41.5 kHz while maintaining 14-bit accuracy and specified dynamic performance. This is enabled by its track-and-hold amplifier, which has a 0.1 dB cutoff frequency of typically 500 kHz and acquires input signals to 14-bit accuracy in ≤2 μs. For anti-alias compliance, an external filter must limit input energy above 41.5 kHz before the VIN pin of the AD7872BRZ.

Does the AD7872BRZ require an external clock source?

No, the AD7872BRZ does not require an external clock source. It features a built-in laser-trimmed 2 MHz oscillator activated by tying the CLK pin to VSS. An external TTL-compatible clock may be applied to CLK if system-level synchronization is needed, but the internal clock eliminates timing component count and layout complexity. The AD7872BRZ datasheet confirms internal clock operation is fully characterized and production-tested.

How is the serial interface of the AD7872BRZ configured and timed?

The AD7872BRZ serial interface uses three dedicated pins: SSTRB (active-low framing strobe), SCLK (gated serial clock), and SDATA (MSB-first serial data). SCLK is open-drain and requires a 2 kΩ pull-up; SSTRB and SDATA are open-drain and require 4.7 kΩ pull-ups. Data is valid on the falling edge of SCLK when SSTRB is low. Minimum SCLK cycle time is 440 ns, and SCLK-to-SDATA delay is ≤155 ns - all timing values are 100% production tested per the AD7872BRZ datasheet Rev. F.

Can the AD7872BRZ operate with a single +5 V supply?

No, the AD7872BRZ cannot operate with a single +5 V supply. It requires dual ±5 V analog supplies (VDD = +5 V, VSS = −5 V) to support its ±3 V bipolar input range and internal circuitry. Both VDD pins (9 and 16) must be connected to +5 V, and VSS (pin 15) to −5 V. Digital ground (DGND, pin 8) and analog ground (AGND, pin 12) must be kept separate and joined at a single point to maintain 80 dB SNR performance.

What is the purpose of the CREF pin on the AD7872BRZ?

The CREF pin on the AD7872BRZ is the decoupling node for the internal 3 V buried Zener reference. A 10 nF capacitor must be connected between CREF and AGND to suppress high-frequency noise generated by internal reference switching. This capacitor is mandatory for achieving specified dynamic performance (80 dB SNR); omitting it degrades SNR and increases integral nonlinearity error. The AD7872BRZ datasheet explicitly states this 10 nF value is required for normal operation.