Analog Devices Inc. AD7872KN
- Part No.:
- AD7872KN
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 16-DIP (0.300", 7.62mm)
- Datasheet:
-
AD7872KN.pdf
- Description:
- IC ADC 14BIT SAR 16DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,331
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Product details
Overview
AD7872KN from Analog Devices is a complete monolithic 14-bit successive approximation analog-to-digital converter (ADC) with integrated track-and-hold amplifier, 3 V buried Zener reference, and serial-only digital interface. It operates from ±5 V supplies, accepts bipolar ±3 V analog inputs, delivers 83 kSPS throughput, achieves 80 dB SNR at 10 kHz, and features 57 ns data access time. It is used in high-speed DSP servo control and spectrum analysis systems requiring precise timing and low-noise conversion.
For engineers reviewing the AD7872KN datasheet, AD7872KN pinout, AD7872KN application, or AD7872KN equivalent, key selection considerations include its serial-only output architecture, ±5 V dual-supply requirement, 16-pin PDIP/SOIC/CERDIP package compatibility, 2 μs track-and-hold acquisition time, and guaranteed 14-bit no-missing-codes performance across 0°C to +70°C.
Technical Context
The AD7872KN implements a self-contained LC2MOS SAR architecture with laser-trimmed internal 2 MHz clock, eliminating external timing components. Its track-and-hold amplifier supports full-power input signals up to 41.5 kHz and acquires to 14-bit accuracy in ≤2 μs.
It uses twos-complement coding, provides REF OUT at 2.99–3.01 V (±40 ppm/°C tempco), and requires external pull-up resistors on SSTRB (4.7 kΩ) and SCLK (2 kΩ) for serial interface compliance. All dynamic specifications-including THD (−86 dB max), IMD (−86 dB max second-order), and peak spurious noise-are fully characterized at 10 kHz input frequency.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 14-bit with guaranteed no missing codes-ensures monotonicity and linearity for precision measurement. |
| Throughput Rate | 83 kSPS-supports real-time sampling of audio-band and control-loop signals without undersampling. |
| SNR | 80 dB min at 10 kHz-enables high-fidelity digitization of low-distortion sine waves in spectral analysis. |
| Analog Input Range | ±3 V bipolar-directly interfaces with industrial sensor outputs and op-amp stages without level-shifting. |
| Reference Output | 3.00 V ±10 mV at +25°C, ±40 ppm/°C-provides stable, temperature-compensated bias for external circuitry. |
| Power Dissipation | 50 mW typical (95 mW max)-enables use in thermally constrained embedded systems with minimal heatsinking. |
| Data Interface | Serial only (SSTRB/SCLK/SDATA)-reduces PCB trace count and simplifies connection to microcontrollers with UART or bit-banged SPI. |
Pinout & Package
AD7872KN is housed in a 16-pin plastic DIP (PDIP) package with 0.3-inch body width and standard through-hole mounting. Pin spacing is 0.1 inch, compatible with industry-standard sockets and prototyping boards.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 CONTROL | Serial clock gating control | Selects continuous (−5 V) or gated (0 V) SCLK output-determines serial framing behavior for host synchronization. |
| 2 CONVST | Asynchronous conversion trigger | Rising-edge initiates hold mode; enables precise jitter-free sampling when driven by external timer. |
| 3 CLK | Internal/external clock selector | Tied to VSS enables 2 MHz internal oscillator; external TTL clock accepted for system-level timing alignment. |
| 4 SSTRB | Active-low serial frame pulse | Three-state output with 4.7 kΩ pull-up-defines start of 14-bit serial word; must be sampled on falling SCLK edge. |
| 5 SCLK | Gated serial clock output | Open-drain, requires 2 kΩ pull-up; clocks SDATA bits; frequency derived from ADC clock (2 MHz nominal). |
| 6 SDATA | Three-state serial data output | Valid on falling SCLK edge when SSTRB low; MSB-first twos-complement format; 4.7 kΩ pull-up required. |
| 8 DGND | Digital ground reference | Separate return path for logic circuitry-must be isolated from AGND except at single-point star ground. |
| 9 & 16 VDD | +5 V analog supply | Both pins must be connected together and decoupled with 0.1 μF ceramic capacitor near package. |
| 11 CREF | Reference decoupling node | Connect 10 nF capacitor to AGND-critical for minimizing reference noise and maintaining 80 dB SNR. |
| 12 AGND | Analog ground reference | Return for track-and-hold, reference, and comparator-requires low-impedance connection to system analog ground plane. |
| 13 REFOUT | 3 V reference output | Supplies up to 500 μA; max 50 pF load capacitance; external decoupling needed if used off-chip. |
| 14 VIN | Differential analog input | ±3 V range into 15 kΩ input impedance; accepts true bipolar signals without external level shifters. |
| 15 VSS | −5 V analog supply | Must be decoupled with 0.1 μF ceramic capacitor; powers internal DAC, comparator, and reference core. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated 3 V buried Zener reference | Factory-laser-trimmed to ±10 mV tolerance with ±40 ppm/°C drift-eliminates need for external reference ICs and reduces BOM count. |
| Self-contained 2 MHz clock | On-chip oscillator requires no external crystals or RC networks-simplifies layout and improves EMI immunity in noisy environments. |
| Twos-complement serial output | 14-bit MSB-first stream synchronized to SSTRB/SCLK-enables direct interface to FPGA GPIO or MCU bit-banged peripherals without parallel bus overhead. |
| Track-and-hold acquisition time | ≤2 μs to 14-bit accuracy-supports accurate digitization of fast transients and wideband signals up to 41.5 kHz full-power bandwidth. |
| Bipolar ±3 V input range | Direct compatibility with industrial transducer outputs and op-amp signal chains-avoids gain/offset errors introduced by external level-shifting circuits. |
Applications
| Digital Signal Processing (DSP) Systems | High-Speed Modem Front-Ends |
|---|---|
Use Scenario: Real-time acquisition of baseband I/Q signals in software-defined radio receivers operating at 40+ kHz sampling rates. IC Role / Device Role / Timing Role: ADC front-end converting analog IF outputs to 14-bit serial data for FPGA-based demodulation and filtering. Use Value: 80 dB SNR and −86 dB THD preserve modulation fidelity; serial interface reduces FPGA pin count and routing complexity. | Use Scenario: Digitizing analog line signals in V.34/V.90 modem designs requiring >70 dB dynamic range for echo cancellation. IC Role / Device Role / Timing Role: High-accuracy sampling engine capturing channel response for adaptive equalizer coefficient calculation. Use Value: Guaranteed 14-bit no-missing-codes performance ensures linear quantization across full ±3 V range, critical for BER-sensitive symbol recovery. |
| Spectrum Analysis Instruments | DSP Servo Control Loops |
Use Scenario: Portable FFT analyzers measuring mechanical vibration spectra up to 20 kHz with <0.1 dB amplitude flatness. IC Role / Device Role / Timing Role: Precision ADC capturing time-domain waveforms for real-time spectral decomposition via embedded DSP. Use Value: 83 kSPS throughput and 2 μs acquisition time enable 1024-point FFTs with <1% leakage error at 10 kHz fundamental. | Use Scenario: Closed-loop position control in industrial CNC motion controllers requiring sub-micron resolution feedback. IC Role / Device Role / Timing Role: High-stability ADC digitizing resolver or LVDT outputs for real-time PID computation in motor drive ASICs. Use Value: ±1 LSB integral nonlinearity and ±12 LSB gain error ensure repeatable position tracking over temperature without recalibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 14-bit serial-output ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7872JRZ | Same die, SOIC-16 package with lead-free finish and extended −40°C to +85°C operation. | Preferred for surface-mount production and industrial temperature range requirements. | Select AD7872JRZ when RoHS compliance, reflow soldering, or wider temperature range is mandatory. |
| ADS8320UB | 16-bit, 100 kSPS, SPI-compatible serial interface, single +5 V supply, no internal reference. | Higher resolution but requires external reference and level-shifting for ±3 V inputs. | Choose ADS8320UB only if 16-bit resolution justifies added external components and design complexity. |
Compared with AD7872KN, AD7872JRZ offers identical electrical performance in a modern SOIC package with broader temperature support, while ADS8320UB trades simplicity and bipolar input capability for higher resolution and single-supply operation-making AD7872KN optimal for cost-sensitive, ±5 V-based legacy systems needing proven reliability.
Availability
AD7872KN is available at Aetrix Electronics and suitable for digital signal processing systems, high-speed modem front-ends, and spectrum analysis instruments requiring stable component supply and long-term obsolescence management.
Supply support for AD7872KN includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD787x family was designed specifically for high-speed, high-accuracy data acquisition in DSP-centric systems where integration, low power, and guaranteed 14-bit performance outweigh raw speed or ultra-low noise.
FAQ
What is the maximum analog input frequency supported by the AD7872KN without aliasing?
The AD7872KN supports full-power analog input signals up to 41.5 kHz, as specified in the General Description. This corresponds to the Nyquist frequency for its 83 kSPS throughput rate. For anti-aliasing compliance, an external filter with cutoff ≤20.75 kHz is required when sampling signals near this limit. The track-and-hold amplifier's 500 kHz 0.1 dB bandwidth ensures minimal aperture uncertainty at these rates.
Does the AD7872KN require external clock components to operate?
No, the AD7872KN does not require external clock components. It features a self-contained, laser-trimmed internal 2 MHz oscillator. Tying the CLK pin to VSS enables this internal clock, eliminating external crystals, capacitors, or RC networks. An external TTL-compatible clock may be applied to CLK only if system-level synchronization is needed.
How is the serial data format structured on the AD7872KN?
The AD7872KN outputs 14-bit twos-complement data MSB-first on SDATA, framed by active-low SSTRB and clocked by SCLK. Data is valid on the falling edge of SCLK when SSTRB is low. The serial word contains all 14 bits with no preamble or framing bits-requiring precise host timing alignment to SSTRB assertion and SCLK edges per the timing specs in Table 2.
Can the AD7872KN operate with a single +5 V supply?
No, the AD7872KN requires dual ±5 V supplies (VDD = +5 V, VSS = −5 V) as specified in the Absolute Maximum Ratings and Power Requirements tables. Its internal 3 V buried Zener reference, track-and-hold amplifier, and comparator core depend on the negative rail for proper bipolar signal handling and reference stability. Operation outside ±5 V ±5% violates guaranteed specifications.
What is the purpose of the CREF pin on the AD7872KN?
The CREF pin on the AD7872KN is the decoupling node for the internal 3 V buried Zener reference. A 10 nF capacitor must be connected between CREF and AGND to minimize reference noise and maintain the specified 80 dB SNR. This capacitor stabilizes the reference during internal switching events and is mandatory for achieving datasheet AC performance-omitting it degrades dynamic parameters significantly.
AD7872KN Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Number of Bits:
- 14
- Sampling Rate (Per Second):
- 83k
- Number of Inputs:
- 1
- Input Type:
- Single Ended
- Data Interface:
- SPI, Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- ±5V
- Voltage - Supply, Digital:
- ±5V
- Features:
- -
- Operating Temperature:
- 0°C ~ 70°C
- Supplier Device Package:
- 16-PDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD7872KN FAQ
1.How can I place an order for AD7872KN through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7872KN on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7872KN reliable?
The price and inventory of AD7872KN are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7872KN is usually 5 days.
3.What payment methods are accepted for AD7872KN?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7872KN transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7872KN?
AD7872KN orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7872KN order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7872KN?
For technical support, including AD7872KN datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7872KN requirements.
6.How does Aetrix verify that AD7872KN is sourced from the original manufacturer or authorized distributors?
All AD7872KN products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7872KN meets industry standards.
7.What is the process for return or replacement of AD7872KN?
All AD7872KN units undergo pre-shipment inspection (PSI). If there is an issue with AD7872KN, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7872KN part is unused and in its original packaging.
Return procedure for AD7872KN:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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