Analog Devices Inc. AD7872KR

Overview

AD7872KR from Analog Devices is a complete monolithic 14-bit successive approximation analog-to-digital converter (ADC) with integrated track-and-hold amplifier, 3 V buried Zener reference, and serial-only digital interface. It operates from ±5 V supplies, accepts bipolar ±3 V analog inputs, delivers 83 kSPS throughput, achieves 80 dB SNR at 10 kHz, and features 57 ns data access time. It is used in high-speed DSP servo control and spectrum analysis systems requiring precise timing and low-noise conversion.

For engineers reviewing the AD7872KR datasheet, AD7872KR pinout, AD7872KR application, or AD7872KR equivalent, this page provides verified technical context, real-world interface constraints, confirmed dynamic and DC specifications, validated serial interface timing, and manufacturer-confirmed alternative options for sampling ADC selection in embedded signal acquisition designs.

Technical Context

The AD7872KR implements a self-contained LC2MOS SAR architecture with laser-trimmed internal 2 MHz clock-no external timing components required. Its track-and-hold acquires to 14-bit accuracy in ≤2 μs, enabling full-scale input signals up to 41.5 kHz while maintaining 80 dB SNR.

All digital outputs are serial-only: SDATA (three-state), SSTRB (active-low framing strobe), and SCLK (gated open-drain clock). Interface requires external 4.7 kΩ pull-up on SSTRB/SDATA and 2 kΩ on SCLK; serial data is valid on the falling edge of SCLK when SSTRB is low.

Key Specifications

Pinout & Package

AD7872KR is housed in a 16-pin plastic DIP (PDIP) package per Analog Devices' Ordering Guide. Pin assignments are validated per Rev. F datasheet Figure 8 and Table 6.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 14-bit serial-output ADC applications.

Compared with AD7872KR, AD7872JR offers identical functionality at lower qualification cost, while ADS8320U trades integrated simplicity for higher resolution at the expense of added BOM complexity and reduced analog input flexibility.

Availability

AD7872KR is available at Aetrix Electronics and suitable for digital signal processing, high-speed modems, and spectrum analysis applications requiring stable component supply, long-term obsolescence management, and guaranteed traceable sourcing.

Supply support for AD7872KR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7872KR belongs to the AD7871/AD7872 family of complete sampling ADCs designed specifically for demanding DSP and real-time control applications where integration, dynamic performance, and timing determinism are critical.

FAQ

What is the maximum analog input frequency supported by the AD7872KR without aliasing?

The AD7872KR supports full-power analog input signals up to 41.5 kHz while maintaining specified dynamic performance. This is derived from its 83 kSPS throughput rate and Nyquist criterion (f_IN ≤ f_SAMPLE/2). For anti-aliasing compliance, an external filter with cutoff ≤41.5 kHz is required; the internal track-and-hold bandwidth (500 kHz typical) does not relax this requirement.

Does the AD7872KR require an external clock, or can it operate autonomously?

The AD7872KR can operate autonomously using its internal laser-trimmed 2 MHz oscillator-simply tie the CLK pin to VSS. External clocking is optional and enabled by applying a TTL-compatible signal to CLK. Internal clock operation eliminates timing component count and improves system-level EMI immunity.

How is the 14-bit serial data formatted on the AD7872KR's SDATA pin?

The AD7872KR outputs MSB-first twos-complement 14-bit serial data on SDATA. Data is valid on the falling edge of SCLK when SSTRB is asserted low. The complete 14-bit frame is transmitted synchronously with SCLK edges, with SSTRB remaining low for the full duration-exactly 14 clock cycles per conversion.

Can the AD7872KR's internal 3 V reference be used to bias external circuitry?

Yes-the REFOUT pin provides a 3.00 V ±10 mV reference capable of sourcing up to 500 μA. However, total capacitance on REFOUT must not exceed 50 pF for stability. For heavier loads or noise-sensitive circuits, use the CREF pin with a 10 nF capacitor to AGND and buffer REFOUT with a low-output-impedance op-amp.

What is the purpose of the CONTROL pin on the AD7872KR, and how should it be configured?

The CONTROL pin selects SCLK behavior: −5 V enables continuous SCLK output; 0 V gates SCLK off after serial transmission completes. For most microcontroller interfaces, 0 V is preferred-it minimizes bus contention and simplifies timing recovery. Continuous mode (−5 V) is used only when external logic requires constant clock presence.