Analog Devices Inc. AD7880CNZ
- Part No.:
- AD7880CNZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 24-DIP (0.300", 7.62mm)
- Datasheet:
-
AD7880CNZ.pdf
- Description:
- IC ADC 12BIT SAR 24DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,039
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7880CNZ from Analog Devices is a 12-bit monolithic successive-approximation ADC operating from a single +5 V supply, featuring 12 µs conversion time, 3 µs track/hold acquisition, and 70 dB SNR at 66 kHz sampling rate. It supports unipolar (0 V to 5 V, 0 V to 10 V) and bipolar (±5 V) input ranges using internal resistor networks, and is used in battery-powered portable instrumentation and real-time DSP systems.
For engineers reviewing the AD7880CNZ datasheet, AD7880CNZ pinout, AD7880CNZ application, or AD7880CNZ equivalent, key selection criteria include its LC2MOS process-based low-power operation (2 mW in power-save mode), 24-pin DIP package compatibility, three-state parallel data interface (DB0–DB11), and support for microprocessor/DSP interfacing via CONVST, RD, CS, and BUSY control signals.
Technical Context
The AD7880CNZ integrates a charge-balanced comparator that provides inherent track-and-hold functionality, enabling full 12-bit acquisition in ≤3 µs. Its SAR architecture uses a fast-settling voltage-output DAC and operates synchronously with an external 2.5 MHz TTL-compatible CLKIN.
Input range selection is determined by external connections of VINA, VINB, and VREF - not internal registers - with no digital configuration required. The MODE pin controls power state: logic high (VDD) enables normal operation (25 mW typ), logic low (0 V) activates power-save mode (2 mW typ).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 12-bit straight binary output; delivers 4096 discrete codes with 1.22 mV LSB (0–5 V range) or 2.44 mV LSB (±5 V range). |
| Throughput Rate | 66 kHz maximum sampling frequency; enables full-power signal digitization up to 33 kHz per Nyquist criterion. |
| Conversion Time | 12 µs max at 2.5 MHz CLKIN; includes 28 clock cycles plus internal propagation delay. |
| Track/Hold Acquisition | 3 µs max; ensures accurate capture of dynamic analog inputs before conversion begins. |
| Signal-to-Noise Ratio | 70 dB min (typ 72 dB) at 1 kHz input, 66 kHz sampling; confirms usable dynamic range for audio and telecom applications. |
| Power Dissipation | 25 mW typ in normal mode (VDD = 5 V, MODE = VDD); 2 mW typ in power-save mode (MODE = 0 V). |
| Input Voltage Ranges | Three hardware-selectable ranges: 0–5 V, 0–10 V, and ±5 V - all supported with single +5 V supply and no external op amps. |
Pinout & Package
AD7880CNZ is supplied in a 24-pin, 0.3-inch-wide plastic dual-in-line package (DIP), designated N-24 in Analog Devices' ordering guide. Pin spacing conforms to standard 0.1-inch grid; body width is 0.300 inch (7.62 mm).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| VINA | Analog Input A | Primary analog input node; connected with VINB and VREF to configure unipolar/bipolar input range per Figures 5–7. |
| VINB | Analog Input B | Secondary analog reference node; determines input scaling (e.g., AGND for 0–10 V, VREF for ±5 V). |
| AGND | Analog Ground | Reference return for analog circuitry; must be isolated from DGND except at single-point star ground. |
| VREF | Reference Input | Accepts 2.5 V to 5 V; typically tied to VDD; sets full-scale range and directly impacts SNR performance. |
| CS | Chip Select | Active-low enable for data bus; must be low with RD low to assert DB0–DB11 outputs. |
| CONVST | Convert Start | Rising-edge-triggered asynchronous control; initiates track→hold transition and starts conversion cycle. |
| RD | Read Strobe | Active-low signal enabling parallel data output after BUSY goes high; defines data access window (57 ns max). |
| BUSY | Conversion Status | Active-low open-drain output; low during conversion, high when result is ready on data bus. |
| CLKIN | Master Clock Input | TTL/CMOS-compatible 2.5 MHz clock source; mark/space ratio 40/60 to 60/40; governs conversion timing. |
| DGND | Digital Ground | Return path for logic I/O; requires separate routing from AGND to minimize digital noise coupling. |
| DB0–DB11 | Data Outputs | Three-state parallel bus; outputs valid only when CS and RD are both low; compatible with 5 V TTL/CMOS logic. |
| MODE | Power Mode Control | Logic-high (VDD) enables normal operation; logic-low (0 V) activates 2 mW power-save state. |
| VDD | +5 V Supply | Nominal +5 V ±5%; powers analog and digital sections; also serves as default VREF source. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware-configurable input ranges | Three user-selectable analog input spans (0–5 V, 0–10 V, ±5 V) implemented via external pin wiring - no register writes or firmware overhead. |
| Integrated track-and-hold | Charge-balanced comparator architecture eliminates need for external THA; achieves 12-bit settling in ≤3 µs without external components. |
| Low-power dual-mode operation | 25 mW typical active power and 2 mW power-save mode enable extended battery life in portable measurement devices. |
| Microprocessor-compatible parallel interface | Standard control signals (CS, RD, BUSY, CONVST) and 12-bit three-state bus allow direct connection to 8086, MC68000, ADSP-2100, and TMS320x families. |
| Dynamic performance specification | Full AC characterization including 70 dB SNR, –80 dB THD, and IMD confirms suitability for speech, modem, and spectrum analysis applications. |
Applications
| Portable Data Acquisition | DSP-Based Signal Processing |
|---|---|
Use Scenario: Handheld multimeter or field sensor node acquiring analog voltage/current with battery runtime constraints. IC Role / Device Role / Timing Role: Primary analog front-end ADC; samples conditioned sensor output at ≤33 kHz with minimal power draw. Use Value: 2 mW power-save mode extends battery life; 0–10 V range supports industrial 4–20 mA loop receivers without level-shifting. |
Use Scenario: Real-time audio preprocessing stage in voice recognition system using ADSP-2100 or TMS320C25. IC Role / Device Role / Timing Role: High-fidelity analog input channel synchronized to DSP interrupt via BUSY signal. Use Value: 70 dB SNR and –80 dB THD preserve spectral integrity of speech signals; 57 ns data access enables zero-wait-state reads. |
| High-Speed Modem Front-End | Industrial Control Loop Sampling |
Use Scenario: Analog baseband interface in V.34/V.90 modem design requiring clean digitization of band-limited IF signals. IC Role / Device Role / Timing Role: ADC in receive path capturing 0–3.4 kHz POTS-band signals at 66 kHz oversampling rate. Use Value: 12 µs conversion + 3 µs acquisition supports >30 kHz effective input bandwidth; ±5 V range accommodates differential line drivers. |
Use Scenario: Closed-loop feedback sampling in PLC analog I/O module monitoring motor current or temperature transducers. IC Role / Device Role / Timing Role: Precision DC-coupled digitizer for slow-varying industrial signals with offset/full-scale adjust capability. Use Value: Guaranteed monotonicity and ±1 LSB INL/DNL ensure linear control response; unipolar offset error ≤±5 LSB simplifies calibration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 12-bit parallel-output ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7888BRZ | 8-channel, serial SPI interface; 12-bit resolution; 100 kSPS; 2.7–5.25 V supply; no track/hold. | Replaces AD7880CNZ only in multi-channel, space-constrained designs where serial interface and lower power are prioritized over parallel speed. | Select AD7888BRZ when channel count >1 and PCB area is limited; avoid if system requires 24-pin DIP footprint or sub-15 µs throughput. |
| MAX195BCNG+ | 16-bit, serial SPI; 100 kSPS; 4.75–5.25 V; internal reference; no track/hold; higher accuracy but slower interface. | Suitable for precision DC measurements where resolution >12 bits is mandatory, but incompatible with existing AD7880CNZ parallel bus timing. | Choose MAX195BCNG+ only when 16-bit resolution justifies redesigning interface logic and accepting longer conversion latency. |
Compared with AD7880CNZ, AD7888BRZ offers higher channel density and smaller SOIC-16 packaging but sacrifices parallel-speed advantage and built-in track/hold; MAX195BCNG+ delivers superior DC accuracy and resolution but lacks hardware-configurable input ranges and requires complete interface rework.
Availability
AD7880CNZ is available at Aetrix Electronics and suitable for portable instrumentation, DSP-based signal processing, and industrial control applications requiring stable component supply, long-term obsolescence management, and traceable sourcing.
Supply support for AD7880CNZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, founded in 1965 and headquartered in Wilmington, MA.
The AD7880CNZ belongs to Analog Devices' legacy LC2MOS precision ADC product line, designed specifically for cost-sensitive, low-power, single-supply data acquisition systems requiring robust DC and AC performance without external support components.
FAQ
What is the maximum sampling frequency supported by the AD7880CNZ?
The AD7880CNZ supports a maximum sampling frequency of 66 kHz, corresponding to a minimum sampling period of 15.15 µs. This is derived from its 12 µs conversion time plus 3 µs track/hold acquisition time. At this rate, the device can digitize full-power sine wave inputs up to 33 kHz while satisfying the Nyquist–Shannon sampling theorem. Performance remains specified across the full industrial temperature range (–40°C to +85°C).
Does the AD7880CNZ require an external track-and-hold amplifier?
No, the AD7880CNZ does not require an external track-and-hold amplifier. Its charge-balanced comparator architecture provides an inherent track-and-hold function, achieving full 12-bit acquisition in ≤3 µs. This eliminates external components, reduces board area, and avoids additional settling errors - a key differentiator from earlier-generation ADCs like the AD7870 or AD7874.
How is the input voltage range selected on the AD7880CNZ?
The AD7880CNZ supports three input ranges - 0 V to 5 V, 0 V to 10 V, and ±5 V - through hardware configuration only. Range selection is determined by how VINA, VINB, and VREF pins are externally wired, as shown in Figures 5–7 of the datasheet. No internal registers, software commands, or digital control lines are involved; the configuration is static and set at board design time.
What is the purpose of the MODE pin on the AD7880CNZ?
The MODE pin on the AD7880CNZ controls power state: when pulled to VDD, the device operates in normal mode (25 mW typical power dissipation); when pulled to 0 V, it enters power-save mode (2 mW typical). This pin enables rapid, hardware-based power cycling without resetting control logic or losing configuration - critical for battery-powered systems needing intermittent sampling.
Can the AD7880CNZ interface directly with a microcontroller lacking dedicated ADC control signals?
Yes, the AD7880CNZ can interface with general-purpose microcontrollers using GPIO-controlled timing. Its asynchronous CONVST input allows conversion initiation via software-driven pulse, and BUSY status enables polling-based read synchronization. Reference circuits in the datasheet (e.g., Figure 19 for 8086) demonstrate how standard address/data/control lines can emulate required timing - no special ADC interface hardware is needed.
AD7880CNZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 24-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 12
- Sampling Rate (Per Second):
- 66k
- Number of Inputs:
- 2
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External, Supply
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 24-PDIP
- Mounting Type:
- Through Hole
- Grade:
- -
- Qualification:
- -
AD7880CNZ FAQ
1.How can I place an order for AD7880CNZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7880CNZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7880CNZ reliable?
The price and inventory of AD7880CNZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7880CNZ is usually 5 days.
3.What payment methods are accepted for AD7880CNZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7880CNZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7880CNZ?
AD7880CNZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7880CNZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7880CNZ?
For technical support, including AD7880CNZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7880CNZ requirements.
6.How does Aetrix verify that AD7880CNZ is sourced from the original manufacturer or authorized distributors?
All AD7880CNZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7880CNZ meets industry standards.
7.What is the process for return or replacement of AD7880CNZ?
All AD7880CNZ units undergo pre-shipment inspection (PSI). If there is an issue with AD7880CNZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7880CNZ part is unused and in its original packaging.
Return procedure for AD7880CNZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7880CNZ Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

