Analog Devices Inc. AD7940BRMZ

Overview

AD7940BRMZ from Analog Devices is a 14-bit, successive approximation analog-to-digital converter (SAR ADC) optimized for low-power, high-speed data acquisition in space-constrained systems. It delivers 100 kSPS throughput with 81 dB SINAD at 10 kHz input, operates from a single 2.5 V to 5.5 V supply, and features internal VDD-referenced conversion enabling 0 V to VDD unipolar input range - ideal for battery-powered instrumentation and portable medical devices.

For engineers reviewing the AD7940BRMZ datasheet, AD7940BRMZ pinout, AD7940BRMZ application, or AD7940BRMZ equivalent, key selection considerations include its 6-lead SOT-23 footprint, SPI/QSPI/MICROWIRE-compatible serial interface, no-pipeline-delay architecture, 0.5 µA shutdown current, and VDD-derived reference eliminating external reference components.

Technical Context

The AD7940BRMZ implements a capacitive DAC-based SAR architecture with integrated track-and-hold, sampling on the falling edge of CS and completing conversion in exactly 16 SCLK cycles (8 µs max at 2.5 MHz). Its analog input structure includes ESD protection diodes and a 30 pF input capacitance, requiring careful source impedance management to maintain THD performance.

Control logic synchronizes conversion initiation, data framing, and power state transitions entirely via the CS and SCLK signals - no separate conversion start command is needed. Power-down mode is entered by asserting CS high between the 2nd and 10th SCLK falling edges, reducing IDD to 0.3–0.5 µA depending on VDD, with 1 µs typical wake-up time.

Key Specifications

Pinout & Package

AD7940BRMZ is housed in a 6-lead SOT-23 package (2.9 mm × 1.6 mm × 1.1 mm), optimized for ultra-compact PCB layouts and low parasitic inductance. The package supports reflow soldering per JEDEC J-STD-020 and has θJA = 229.6°C/W.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 14-bit SAR ADC applications.

Compared with AD7940BRMZ, AD7942BRMZ offers differential input capability at identical speed and power but demands revised analog front-end design, while ADS8860IDRCT provides higher resolution in a larger package - making AD7940BRMZ optimal for cost-sensitive, space-constrained single-ended applications needing proven 14-bit performance.

Availability

AD7940BRMZ is available at Aetrix Electronics and suitable for battery-powered systems, portable medical instruments, and remote data acquisition systems requiring stable component supply and long-term production continuity.

Supply support for AD7940BRMZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7940BRMZ belongs to Analog Devices' precision SAR ADC product line, engineered for ultra-low-power, high-speed data acquisition in portable and energy-constrained systems where size, accuracy, and efficiency are co-optimized.

FAQ

What is the absolute maximum analog input voltage for the AD7940BRMZ?

The absolute maximum analog input voltage for the AD7940BRMZ is VDD + 0.3 V, as specified in the Absolute Maximum Ratings table. Exceeding this limit risks forward-biasing the internal ESD protection diodes and causing irreversible damage. For safe operation, the analog input must remain within 0 V to VDD under normal conditions, and transient excursions beyond that range must be limited to <300 mV and <10 mA peak current. This constraint applies regardless of the supply voltage used - whether 2.5 V, 3.3 V, or 5 V - and is critical when interfacing with sensors prone to overvoltage events.

Does the AD7940BRMZ require an external voltage reference?

No, the AD7940BRMZ does not require an external voltage reference. It uses an internal reference derived directly from the VDD supply, establishing a full-scale input range of 0 V to VDD. This architecture eliminates the need for external reference ICs, trimming resistors, or decoupling networks dedicated to reference stability. However, because the reference tracks VDD, any noise or ripple on the VDD rail directly modulates the LSB size (VDD/16384), so clean, well-decoupled VDD is essential - especially when high SINAD or low THD is required. The AD7940BRMZ datasheet explicitly states "no external reference is required" in the Circuit Information section.

How many serial clock cycles are needed to complete a full conversion on the AD7940BRMZ?

A full conversion on the AD7940BRMZ requires exactly 16 serial clock (SCLK) cycles to output the complete 14-bit result. The conversion process begins on the falling edge of CS, and the 16-bit serial data frame - consisting of two leading zeros followed by the 14-bit conversion result in MSB-first order - is clocked out on the falling edges of SCLK. This fixed 16-cycle timing is guaranteed across all operating conditions and forms the basis for deterministic latency in real-time systems. If CS remains low beyond 16 cycles, four trailing zeros are appended, but the core conversion result is fully available after cycle 16. This behavior is confirmed in Table 2 (Conversion Time = 8 µs max at 2.5 MHz) and Figure 16 (Normal Mode Operation).

Can the AD7940BRMZ interface directly with 5 V logic microcontrollers while operating from a 3 V supply?

Yes, the AD7940BRMZ can interface directly with 5 V logic microcontrollers while operating from a 3 V supply. Its digital inputs (CS and SCLK) tolerate voltages up to 7 V independent of VDD, as stated in the Absolute Maximum Ratings and clarified in the Digital Inputs section. This allows standard 5 V TTL/CMOS signals to drive CS and SCLK without level shifters. However, the SDATA output remains referenced to VDD - so with VDD = 3 V, SDATA logic high is ~2.8 V, which may fall below the VIH threshold of some 5 V receivers. In such cases, a simple pull-up resistor to 5 V or a single-gate level shifter is recommended for reliable readback. This dual-voltage tolerance simplifies power sequencing and avoids latch-up risks during startup.

What is the typical power dissipation of the AD7940BRMZ at 100 kSPS with a 3.6 V supply?

The typical power dissipation of the AD7940BRMZ at 100 kSPS with a 3.6 V supply is 6.84 mW, as specified in Table 2 under "Power Dissipation." This value corresponds to normal operational mode (not shutdown) and reflects combined analog and digital circuitry consumption during active conversion. At the same condition, the supply current is 1.9 mA max (1.29 mA typical), confirming the calculation: 3.6 V × 1.29 mA ≈ 4.6 mW - consistent with the 6.84 mW max figure accounting for worst-case process/voltage/temperature corners. This ultra-low power enables continuous 100 kSPS acquisition in energy-harvesting or coin-cell-powered applications where average current must stay below 2 µA over extended periods - achievable using the 0.5 µA shutdown mode between samples.