Analog Devices Inc. AD7961BCPZ

Overview

AD7961BCPZ from Analog Devices is a 16-bit, 5 MSPS differential successive approximation register (SAR) analog-to-digital converter with true bipolar input range (±4.096 V or ±5 V), 95.5 dB SNR, ±0.2 LSB typical INL, and LVDS serial interface - designed for high-fidelity digital X-ray, MRI gradient control, and spectroscopy signal acquisition.

For engineers reviewing the AD7961BCPZ datasheet, AD7961BCPZ pinout, AD7961BCPZ application, or AD7961BCPZ equivalent, key selection criteria include throughput latency (zero pipeline delay), differential input swing compatibility, LVDS/CMOS conversion control flexibility, reference buffer configuration options, and thermal stability across −40°C to +85°C operation.

Technical Context

The AD7961BCPZ implements a charge redistribution SAR architecture with no latency or pipeline delay, enabling deterministic timing for time-critical multiplexed acquisition. Its internal conversion clock and dual-mode LVDS interface (self-clocked or echoed clock) support synchronous data capture at up to 5 MSPS with 16-bit resolution and no missing codes.

It features configurable reference handling: external 2.048 V → 4.096 V buffered output, or direct 4.096 V/5 V reference input; VCM pin provides precise REF/2 common-mode voltage for driving differential input amplifiers. Input bandwidth is selectable (28 MHz or 9 MHz) via EN2 pin.

Key Specifications

Pinout & Package

AD7961BCPZ is housed in a 32-lead, 5 mm × 5 mm LFCSP_VQ (QFN) package with exposed pad for thermal management. Pin functions are validated per Analog Devices AD7961 Rev. B datasheet, Table 7 and Figure 4.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed differential ADC applications.

Compared with AD7626BCPZ and AD7960BCPZ, AD7961BCPZ uniquely delivers 16-bit/5 MSPS performance with integrated LVDS serialization, true differential input, and on-chip reference buffer - reducing BOM count and PCB area while maintaining metrology-grade linearity and noise floor.

Availability

AD7961BCPZ is available at Aetrix Electronics and suitable for digital imaging systems, MRI gradient control subsystems, and high-speed test equipment requiring stable component supply, long-term lifecycle assurance, and traceable sourcing.

Supply support for AD7961BCPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7961BCPZ belongs to Analog Devices' PulSAR® family of high-speed precision SAR ADCs, engineered specifically for demanding medical imaging, scientific instrumentation, and industrial automation applications where speed, linearity, and low latency are critical.

FAQ

What is the maximum throughput rate supported by the AD7961BCPZ?

The AD7961BCPZ supports a maximum throughput rate of 5 MSPS (200 ns conversion cycle time), verified across its full operating temperature range (−40°C to +85°C) with no missing codes and specified AC/DC performance. This rate is achievable in both self-clocked and echoed clock LVDS interface modes, with timing margins validated per Table 3 in the AD7961BCPZ datasheet Rev. B.

Does the AD7961BCPZ include an internal reference buffer?

Yes, the AD7961BCPZ includes an internal reference buffer that accepts a 2.048 V input on the REFIN pin and produces a buffered 4.096 V output on the REF pin. When enabled (via EN1/EN0 = XX01), it eliminates the need for an external reference buffer amplifier. The AD7961BCPZ also supports direct 4.096 V or 5 V reference input on REF with the internal buffer disabled.

What interface options does the AD7961BCPZ support for conversion control and data output?

The AD7961BCPZ supports LVDS or CMOS signaling for conversion control (CNV± pins) and uses a serial LVDS interface for data output (D± and DCO± pins). It operates in two distinct LVDS modes: self-clocked (DCO+ grounded, 18-bit frame with sync header) or echoed clock (DCO± mirrors CLK±, 16-bit frame). Both modes are fully documented in Figures 2 and 3 of the AD7961BCPZ datasheet.

What is the analog input voltage range specification for the AD7961BCPZ?

The AD7961BCPZ features a true differential analog input voltage range of ±4.096 V or ±5 V, meaning the difference between IN+ and IN− can swing fully across those ranges. Input common-mode voltage is fixed at REF/2 (provided via VCM pin), and absolute input voltage on each pin is limited to GND −0.1 V to VREF + 0.1 V, as specified in Table 2 of the AD7961BCPZ datasheet.

How does the AD7961BCPZ handle power consumption at full throughput?

At 5 MSPS, the AD7961BCPZ consumes 46.5 mW with external reference buffer and echoed clock mode, or 39 mW with external reference and self-clocked CMOS mode. Power scales linearly with throughput in self-clocked mode (7.8 nJ/sample), and the device supports snooze and power-down states drawing as little as 7.2 μW - all values measured and specified in Table 2 of the AD7961BCPZ datasheet Rev. B.