My Inquiry
My Account
Analog Devices Inc. AD7980SRMZ-EP
- Part No.:
- AD7980SRMZ-EP
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Datasheet:
-
AD7980SRMZ-EP.pdf
- Description:
- IC ADC 16BIT SAR 10MSOP
- Quantity:
- Payment:
- Shipping:
Inventory:114
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD7980SRMZ-EP from Analog Devices is a 16-bit, 1 MSPS successive approximation register (SAR) analog-to-digital converter housed in a 10-lead MSOP package. It operates from a single 2.5 V supply with independent 1.8 V–5 V logic interface (VIO), supports pseudo-differential input (0 V to VREF), and delivers ±1.5 LSB max INL, 91 dB SINAD at 10 kHz, and no pipeline delay-enabling high-precision data acquisition in harsh environments such as aerospace telemetry systems.
For engineers reviewing the AD7980SRMZ-EP datasheet, AD7980SRMZ-EP pinout, AD7980SRMZ-EP application, or AD7980SRMZ-EP equivalent, key selection criteria include its −55°C to +125°C military temperature range, 70 μW power at 10 kSPS, SPI/QSPI/MICROWIRE-compatible serial interface with daisy-chain capability, and enhanced product qualification for defense and aerospace use.
Technical Context
The AD7980SRMZ-EP implements a true SAR architecture with no pipeline latency, sampling on the rising edge of CNV and delivering conversion results immediately after tCONV (max 710 ns). Its analog front-end accepts pseudo-differential inputs referenced to IN−, with full-scale range set by an externally applied 2.4 V–5.1 V reference voltage (REF).
Digital operation is decoupled via separate VIO (1.8 V–5.5 V) and VDD (2.375 V–2.625 V) supplies, enabling interoperability with mixed-voltage host systems. The serial interface supports two modes-CS mode (with busy indicator) and chain mode (for multi-ADC daisy-chaining)-both synchronized to SCK with timing validated across −55°C to +125°C.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 16-bit with no missing codes-guarantees monotonicity and full code coverage over full temperature range. |
| Throughput | 1 MSPS maximum-supports real-time capture of fast transients without undersampling in ATE or radar IF digitization. |
| INL | ±1.5 LSB maximum-ensures end-point linearity error ≤ ±0.023% of full scale (5 V ref), critical for closed-loop control calibration. |
| SINAD | 91 dB at 10 kHz (5 V ref)-translates to effective resolution >15 bits for narrowband signal analysis in communications receivers. |
| Power @ 1 MSPS | Total 7 mW (VDD 4 mW + REF 1.7 mW + VIO 1.3 mW)-enables thermally constrained deployments in sealed avionics modules. |
| Reference Range | 2.4 V to 5.1 V-allows optimization of dynamic range and SNR while maintaining compatibility with standard precision references. |
| Operating Temp | −55°C to +125°C-qualified per AQEC standards for sustained operation in engine-mounted sensors or satellite power systems. |
Pinout & Package
AD7980SRMZ-EP is packaged in a JEDEC-compliant 10-lead MSOP (RM-10), 3.0 mm × 3.0 mm footprint, 0.5 mm pitch, with exposed pad for thermal enhancement (θJA = 200°C/W).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| REF | Analog reference input | Accepts 2.4–5.1 V external reference; requires local 10 µF decoupling to maintain <1.5 LSB INL over temperature. |
| VDD | Analog power supply | 2.375–2.625 V only; powers core ADC and internal bias-must be filtered independently from digital rails. |
| IN+, IN− | Pseudo-differential analog input pair | IN+ accepts 0–VREF signal; IN− serves as ground sense-rejects common-mode noise up to 60 dB at 100 kHz. |
| GND | Analog ground reference | Single-point connection point for REF, IN−, and VDD return; must be isolated from digital ground to avoid coupling errors. |
| CNV | Convert/start command input | Rising edge initiates sampling; also selects interface mode (CS vs. chain) based on SDI state at edge. |
| SDO | Serial data output | 16-bit straight-binary output synchronized to SCK falling edge; tri-states when CNV/SDI high in CS mode. |
| SCK | Serial clock input | Drives data shift-out; minimum period 10.5 ns (VIO > 4.5 V); timing validated across full military temperature range. |
| SDI | Serial data input / mode select | Configures interface mode on CNV rising edge; in chain mode, passes prior ADC's data with 16-cycle delay. |
| VIO | Digital I/O supply | 1.8–5.5 V logic interface supply-enables direct connection to FPGA I/O banks or microcontroller GPIO without level shifters. |
Key Features
| Feature | Design Value |
|---|---|
| No pipeline delay | Conversion result available immediately post-tCONV (≤710 ns), enabling deterministic latency-critical control loops. |
| Daisy-chain capability | Supports synchronous readout of multiple AD7980SRMZ-EP devices on one SDO line-reduces FPGA pin count in multi-channel DAQ systems. |
| Independent VIO supply | 1.8 V–5 V logic interface allows seamless integration with heterogeneous SoCs, FPGAs, or MCUs without voltage translation. |
| Enhanced product qualification | Controlled manufacturing baseline (single fab/assembly site), AQEC compliance, and full military temp validation for defense/aerospace deployment. |
| Low energy per conversion | 7.0 nJ/sample at 1 MSPS-optimizes battery life in portable test equipment and remote sensor nodes. |
Applications
| Battery-Powered Test Equipment | Avionics Sensor Signal Conditioning |
|---|---|
Use Scenario: Portable handheld ATE used for field verification of aircraft sensor outputs (e.g., pressure, temperature transducers) under varying ambient conditions. IC Role / Device Role / Timing Role: ADC digitizes conditioned analog signals with guaranteed linearity and low power draw to extend battery runtime between calibrations. Use Value: 70 μW standby power and −55°C to +125°C operation enable 8+ hour continuous use in unheated hangars or high-altitude ground support. | Use Scenario: Front-end digitization of engine health monitoring signals (vibration, exhaust gas temperature) in FADEC subsystems. IC Role / Device Role / Timing Role: High-accuracy, low-latency ADC capturing transient events during throttle transients with deterministic 1 MSPS sampling. Use Value: ±1.5 LSB INL and 91 dB SINAD ensure reliable fault detection thresholds are met across full flight envelope and service life. |
| Spacecraft Power System Monitoring | High-Reliability Medical Imaging Calibration |
Use Scenario: Real-time monitoring of solar array IV curves and battery cell voltages aboard LEO satellites with radiation-hardened requirements. IC Role / Device Role / Timing Role: Radiation-tolerant ADC providing stable reference tracking and precise DC measurement in zero-gravity thermal cycling environments. Use Value: Enhanced product change notification and qualification data availability support long-term BOM stability for 15-year mission lifetimes. | Use Scenario: Calibration reference channel in MRI gradient amplifier feedback loops requiring traceable linearity and minimal thermal drift. IC Role / Device Role / Timing Role: Precision ADC measuring shunt voltage for current regulation, where gain error drift ≤ ±0.35 ppm/°C prevents image artifact accumulation. Use Value: Gain error temperature drift spec ensures <0.001% full-scale deviation over 37°C–42°C patient chamber temperature swings. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-precision SAR ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD7982BRMZ-REEL7 | Same 16-bit/1 MSPS SAR architecture but commercial grade (−40°C to +85°C); no EP qualification or AQEC support. | Lacks military temp range and controlled baseline-unsuitable for aerospace or extended-life industrial deployments. | Select only for cost-sensitive terrestrial applications where full EP traceability and extended temperature are not required. |
| ADS8860IDRCT | Texas Instruments 16-bit, 1 MSPS SAR ADC with SPI interface; 1.8 V supply only; ±1.25 LSB INL; no VIO rail separation. | Requires external level-shifting for 3 V/5 V hosts; lacks daisy-chain mode and military temp rating. | Consider only if system uses exclusively 1.8 V logic and does not require multi-ADC synchronization or extended temperature operation. |
Compared with AD7982BRMZ-REEL7 and ADS8860IDRCT, the AD7980SRMZ-EP uniquely combines military-grade temperature operation, dual-supply flexibility (VDD/VIO), daisy-chain capability, and AQEC-managed lifecycle-making it the sole option for defense-critical signal acquisition where reliability and supply continuity are non-negotiable.
Availability
AD7980SRMZ-EP is available at Aetrix Electronics and suitable for battery-powered test equipment, avionics sensor conditioning, spacecraft power monitoring, and high-reliability medical imaging calibration requiring stable component supply across extended product lifecycles.
Supply support for AD7980SRMZ-EP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, serving precision instrumentation, industrial automation, and aerospace markets since 1965.
The AD7980-EP product line delivers radiation-tolerant, temperature-stable SAR ADCs engineered specifically for defense electronics, satellite subsystems, and other mission-critical applications demanding verified long-term reliability.
FAQ
What is the absolute maximum reference voltage for AD7980SRMZ-EP?
The absolute maximum reference voltage for AD7980SRMZ-EP is 5.1 V, with a recommended operating range of 2.4 V to 5.1 V. Exceeding 5.1 V risks permanent damage per Absolute Maximum Ratings (Table 5), and operation below 2.4 V degrades SNR and increases INL beyond specified limits. The AD7980SRMZ-EP reference input is not buffered, so external reference stability and low output impedance are essential to maintain ±1.5 LSB INL performance.
Does AD7980SRMZ-EP support daisy-chain configuration with other ADCs?
Yes, AD7980SRMZ-EP supports daisy-chain configuration via its SDI and SDO pins in chain mode. When SDI is low at the CNV rising edge, the device enters chain mode: the SDI input passes through to SDO after a fixed 16-SCK-cycle delay, allowing multiple AD7980SRMZ-EP units to share one serial bus. This eliminates the need for individual chip-select lines and simplifies FPGA resource usage in multi-channel systems.
What is the minimum SCK period supported by AD7980SRMZ-EP at 125°C?
At +125°C, AD7980SRMZ-EP requires VIO ≥ 3.3 V and supports a minimum SCK period of 13 ns (76.9 MHz), per Table 4 timing specifications. This is validated across the full −55°C to +125°C range. Using VIO < 3.3 V above 85°C violates the datasheet's operating conditions and may cause data corruption or interface lockup-so VIO must be ≥3.3 V for reliable 1 MSPS operation at maximum temperature.
Can AD7980SRMZ-EP operate with a 1.8 V VIO supply while maintaining 1 MSPS throughput?
No-AD7980SRMZ-EP cannot maintain 1 MSPS throughput with 1.8 V VIO. Per Table 4, 1 MSPS operation requires VIO ≥ 2.3 V up to +85°C and VIO ≥ 3.3 V above +85°C. At 1.8 V, the device supports only lower throughput modes (e.g., 10 kSPS), and attempting 1 MSPS will violate timing margins, risking invalid data or interface failure. The AD7980SRMZ-EP's VIO range is 1.8 V–5.5 V, but speed grade is thermally gated.
Is the AD7980SRMZ-EP pin-compatible with the commercial AD7980BRMZ?
Yes, AD7980SRMZ-EP is pin-compatible with AD7980BRMZ-the same 10-lead MSOP (RM-10) package, identical pinout (REF, VDD, IN+, IN−, GND, CNV, SDO, SCK, SDI, VIO), and matching footprint. However, AD7980SRMZ-EP adds enhanced product features including military temperature range, AQEC qualification, and controlled manufacturing baseline-not present in the commercial variant.
AD7980SRMZ-EP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- PulSAR®
- Package/Case:
- 10-TFSOP, 10-MSOP (0.118", 3.00mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 16
- Sampling Rate (Per Second):
- 1M
- Number of Inputs:
- 1
- Input Type:
- Pseudo-Differential
- Data Interface:
- SPI, DSP
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- SAR
- Reference Type:
- External
- Voltage - Supply, Analog:
- 2.375V ~ 2.625V
- Voltage - Supply, Digital:
- 2.375V ~ 2.625V
- Features:
- -
- Operating Temperature:
- -40°C ~ 125°C
- Supplier Device Package:
- 10-MSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD7980SRMZ-EP FAQ
1.How can I place an order for AD7980SRMZ-EP through Aetrix?
Please submit a Request for Quotation (RFQ) for AD7980SRMZ-EP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD7980SRMZ-EP reliable?
The price and inventory of AD7980SRMZ-EP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7980SRMZ-EP is usually 5 days.
3.What payment methods are accepted for AD7980SRMZ-EP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7980SRMZ-EP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD7980SRMZ-EP?
AD7980SRMZ-EP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD7980SRMZ-EP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD7980SRMZ-EP?
For technical support, including AD7980SRMZ-EP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7980SRMZ-EP requirements.
6.How does Aetrix verify that AD7980SRMZ-EP is sourced from the original manufacturer or authorized distributors?
All AD7980SRMZ-EP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7980SRMZ-EP meets industry standards.
7.What is the process for return or replacement of AD7980SRMZ-EP?
All AD7980SRMZ-EP units undergo pre-shipment inspection (PSI). If there is an issue with AD7980SRMZ-EP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD7980SRMZ-EP part is unused and in its original packaging.
Return procedure for AD7980SRMZ-EP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD7980SRMZ-EP Tags
-
ADC081C021CIMKX/NOPB
Texas Instruments
-
MCP3021A5T-E/OT
Microchip Technology
-
TLA2024IRUGR
Texas Instruments
-
MCP3221A5T-E/OT
Microchip Technology
-
MCP3221A5T-I/OT
Microchip Technology
-
MCP3221A4T-E/OT
Microchip Technology
-
MCP3221A6T-E/OT
Microchip Technology
-
MCP3221A0T-E/OT
Microchip Technology
-
MCP3221A1T-E/OT
Microchip Technology
-
ADC121S021CIMFX/NOPB
Texas Instruments
-
MCP3001-I/MS
Microchip Technology
-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
