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Analog Devices Inc. AD7985BCPZ

Part No.:
AD7985BCPZ
Manufacturer:
Analog Devices Inc.
Category:
Analog to Digital Converters (ADC)
Package:
20-WFQFN Exposed Pad, CSP
Datasheet:
AetrixAD7985BCPZ.pdf
Description:
IC ADC 16BIT SAR 20LFCSP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:235

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Product details

Overview

AD7985BCPZ from Analog Devices is a 16-bit, 2.5 MSPS successive approximation ADC (SAR ADC) with pseudo-differential input, on-chip reference, and SPI-compatible serial interface. It delivers ±0.7 LSB typical INL, 88.5 dB SNR (with internal reference), and operates from −40°C to +85°C in battery-powered data acquisition systems.

For engineers reviewing the AD7985BCPZ datasheet, AD7985BCPZ pinout, AD7985BCPZ application, or AD7985BCPZ equivalent, this page provides verified specifications, validated pin functions, real-world timing behavior, and confirmed drop-in alternatives for high-speed precision sampling in medical instruments and ATE.

Technical Context

The AD7985BCPZ uses a charge redistribution capacitive DAC architecture with integrated track-and-hold, delivering zero pipeline delay and deterministic conversion latency of 320 ns in turbo mode. Its dual-mode operation-turbo (2.5 MSPS, no inter-conversion power-down) and normal (2.0 MSPS, dynamic power scaling)-is controlled directly by the TURBO pin.

It supports flexible reference configuration: internal 4.096 V bandgap reference (±10 ppm/°C drift) or external reference up to 5.0 V, with dedicated REFIN and PDREF pins enabling precise buffer control. The serial interface operates at 1.8 V/2.5 V/2.7 V logic levels via VIO and supports daisy-chain mode with busy indicator using SDI/CNV edge detection.

Key Specifications

Parameter Value and Actual Design Meaning
Resolution 16-bit with no missing codes - guarantees monotonicity and full code coverage across full temperature range.
Throughput 2.5 MSPS (turbo mode), 2.0 MSPS (normal mode) - fixed conversion time enables deterministic timing in real-time control loops.
INL ±0.7 LSB typical, ±1.5 LSB max - ensures accurate DC measurement fidelity in precision instrumentation.
SNR 88.5 dB (internal ref), 90 dB (external ref) - supports >14.7 ENOB for high-fidelity signal capture in medical imaging front-ends.
Power Dissipation 15.5 mW at 2.5 MSPS with external reference - enables portable, thermally constrained designs without active cooling.
Analog Input Range 0 V to VREF (up to 5.0 V), pseudo-differential - simplifies sensor interfacing with single-ended or differential sources.
Reference Drift ±10 ppm/°C (4.096 V internal) - meets stability requirements for uncalibrated 8-hour industrial logging sessions.

Pinout & Package

AD7985BCPZ is housed in a 20-lead, 4 mm × 4 mm LFCSP package with exposed pad (EP) recommended for soldering to system ground plane. Pin functions are validated per Analog Devices Rev. C datasheet Figure 4 and Table 6.

Pin/Terminal Circuit Role Design Meaning
1, 2 REF Reference Output/Input Outputs 4.096 V when PDREF = low; accepts external reference up to 5.0 V when PDREF = high - decoupling with 10 µF capacitor required.
3, 4 REFGND Analog Reference Ground Dedicated ground return for REF pin - must be connected to analog ground plane and decoupled adjacent to REF pins.
5 IN− Analog Input Sense Ground reference point for pseudo-differential input - connects to remote analog ground or system AGND to reject common-mode noise.
6 IN+ Analog Input Primary analog input node - voltage measured relative to IN−, range = 0 V to VREF - supports rail-to-rail input with no external level-shifting.
7 PDREF Reference Power-Down Control Digital input controlling internal reference enable/disable - low = internal reference active; high = external reference required.
8 VIO Digital Interface Supply Separate 1.8 V/2.5 V/2.7 V supply for digital I/O - isolates logic noise from analog section and enables mixed-voltage system integration.
9 SDO Serial Data Output 16-bit straight-binary output synchronized to SCK - supports daisy-chain readout and busy-indicator signaling in CS or chain modes.
10 DGND Digital Ground Return path for DVDD and digital I/O - must be separated from AGND/REFGND and joined at single-point star ground.
11 DVDD Digital Power Supply 2.5 V nominal supply for digital core - regulated independently from AVDD to minimize digital switching noise coupling into analog domain.
12 SCK Serial Clock Input Asynchronous clock driving serial interface - timing parameters defined for both CS and chain modes (min 9 ns period in CS mode).
13 CNV Convert Trigger & Mode Select Rising edge initiates conversion and selects interface mode (CS vs. chain) based on SDI state - also enables busy indicator when low in CS mode.
14 SDI Serial Data Input / Mode Select Configures interface mode on CNV rising edge (low = chain, high = CS); in chain mode, shifts prior ADC's data out on SDO after 16 SCK cycles.
15 TURBO Conversion Speed Control High = 2.5 MSPS continuous operation; low = 2.0 MSPS with inter-conversion power-down - enables dynamic power/performance trade-off.
16 AVDD Analog Power Supply 2.5 V nominal supply for analog front-end - must be filtered separately from DVDD to preserve SNR performance.
17, 18 AGND Analog Ground Return path for AVDD and analog circuitry - physically isolated from DGND and connected only at system-level star point.
19 BVDD Reference Buffer Power 5.0 V supply for internal reference buffer - required when using internal reference; powers external buffer if 5 V external reference is used.
20 REFIN Reference Buffer Input/Output Provides 1.2 V internal bandgap reference when PDREF = low; accepts 1.2 V external bias when PDREF = high - decoupled with 0.1 µF capacitor.
Exposed Pad (EP) Thermal & Mechanical Anchor Not electrically connected internally - must be soldered to system ground plane to ensure thermal dissipation (θJA = 30.4°C/W) and mechanical reliability.

Key Features

Feature Design Value
No pipeline delay Enables immediate use of conversion result in closed-loop control - eliminates need for FIFO buffering or latency compensation firmware.
Separate VIO supply Allows direct interfacing with 1.8 V FPGAs or 2.7 V microcontrollers without level shifters - reduces BOM count and layout complexity.
Daisy-chain capability Supports synchronous sampling of multiple channels using single SCK/SDO bus - cuts PCB routing layers and reduces host GPIO usage in multi-ADC systems.
Two-speed conversion modes Turbo mode delivers maximum throughput for burst acquisition; normal mode reduces average power by >40% during idle periods - extends battery life in portable ATE.
On-chip 4.096 V reference Eliminates external reference IC and associated decoupling components - saves board space and improves long-term drift stability versus discrete solutions.

Applications

Portable ECG Monitor Automated Test Equipment (ATE)

Use Scenario: Continuous 2.5 MSPS sampling of amplified biopotential signals from electrode arrays in handheld diagnostic devices.

IC Role / Device Role / Timing Role: Primary SAR ADC capturing raw analog waveforms with <100 ns transient response and no latency-induced phase error.

Use Value: 88.5 dB SNR and ±0.7 LSB INL enable detection of microvolt-level ST-segment deviations without post-acquisition calibration.

Use Scenario: High-throughput digitization of DUT output signals during functional testing of mixed-signal ICs.

IC Role / Device Role / Timing Role: Precision acquisition engine synchronized to test pattern generator clocks via CNV edge triggering.

Use Value: Deterministic 320 ns conversion time and daisy-chain support allow tight channel-to-channel skew control (<5 ns) across 8-channel ATE backplanes.

Industrial Data Logger Communications Baseband Receiver

Use Scenario: Battery-operated environmental sensor hub recording temperature, pressure, and vibration over 72-hour deployments.

IC Role / Device Role / Timing Role: Low-power ADC operating in normal mode (TURBO = low) with adaptive sampling rate based on event triggers.

Use Value: 12 mW power at 2.0 MSPS and ±10 ppm/°C reference drift ensure 16-bit accuracy across −40°C to +85°C without heater or recalibration.

Use Scenario: Digitizing IF signals in software-defined radio receivers requiring wide dynamic range and low harmonic distortion.

IC Role / Device Role / Timing Role: Front-end ADC providing 90 dB SFDR and −100 dB THD for clean baseband reconstruction before DSP processing.

Use Value: 103 dB SFDR at 20 kHz input enables simultaneous reception of weak and strong adjacent-channel signals in LTE femtocell receivers.

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed precision SAR ADC applications.

Alternative Part Technical Difference Application Difference Selection Advice
AD7986BCPZ 18-bit resolution, same 20-lead LFCSP package, pin-for-pin compatible - adds 2 extra LSBs but increases power to 33 mW at 2.5 MSPS with internal reference. Required where ENOB >15.5 bits is mandatory (e.g., seismic sensor digitization); not suitable for space-constrained 16-bit-only layouts due to higher thermal load. Select AD7986BCPZ only when resolution gain justifies 2.1× higher power and added cost; AD7985BCPZ remains optimal for 16-bit–constrained designs.
AD7980BRMZ 16-bit, 1 MSPS max, MSOP-10 package - lacks TURBO/normal mode control, no daisy-chain, and uses single 2.5 V supply (no VIO separation). Suitable for low-cost, low-speed data loggers where 2.5 MSPS is unnecessary and board area is less critical than component count. Choose AD7980BRMZ for cost-sensitive, non-battery applications below 1 MSPS; AD7985BCPZ is essential for turbo-mode timing-critical or multi-ADC systems.

Compared with AD7986BCPZ, AD7985BCPZ trades 2 bits of resolution for 57% lower power and identical footprint; compared with AD7980BRMZ, it adds 150% throughput, daisy-chain support, and VIO flexibility at the cost of larger package and higher unit price.

Availability

AD7985BCPZ is available at Aetrix Electronics and suitable for battery-powered equipment, communications infrastructure, and automated test equipment requiring stable component supply, long-lifecycle assurance, and traceable sourcing.

Supply support for AD7985BCPZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD7985BCPZ belongs to the PulSAR® family of precision SAR ADCs, designed specifically for applications demanding high speed, low power, and excellent DC/AC accuracy in space-constrained industrial and medical systems.

FAQ

What is the maximum sample rate of the AD7985BCPZ and how is it enabled?

The AD7985BCPZ achieves a maximum sample rate of 2.5 MSPS in turbo mode, which is activated by holding the TURBO pin high. In this mode, the ADC does not power down between conversions, ensuring deterministic timing with 320 ns conversion time from CNV rising edge to data availability. The first conversion in turbo mode contains invalid data and must be discarded.

Does the AD7985BCPZ require an external reference, or can it operate with its internal reference?

The AD7985BCPZ can operate with either its internal 4.096 V reference (enabled by pulling PDREF low) or an external reference up to 5.0 V (enabled by pulling PDREF high). When using the internal reference, REFIN outputs 1.2 V and requires 0.1 µF decoupling; REF must be decoupled with 10 µF. Internal reference drift is ±10 ppm/°C, supporting uncalibrated operation across −40°C to +85°C.

How does the AD7985BCPZ interface with a microcontroller that uses 1.8 V I/O levels?

The AD7985BCPZ interfaces directly with 1.8 V microcontrollers via its separate VIO supply pin (Pin 8), which accepts 1.8 V to 2.7 V. Digital inputs (CNV, SCK, SDI, TURBO, PDREF) recognize 0.1 × VIO as VIH threshold and 0.9 × VIO as VIL threshold, while SDO output drives to VIO − 0.3 V for VOH - eliminating need for external level shifters in mixed-voltage systems.

Can multiple AD7985BCPZ devices share a single serial interface bus?

Yes, the AD7985BCPZ supports daisy-chain mode: when SDI is low at CNV rising edge, the device enters chain mode and shifts its 16-bit result onto SDO after 16 SCK cycles, allowing up to N devices to share one SCK/SDO pair. Each device's CNV must be tied together, and SDI of downstream devices connects to upstream SDO - enabling synchronized multi-channel sampling without additional chip-select lines.

What is the purpose of the exposed pad on the AD7985BCPZ LFCSP package?

The exposed pad on the AD7985BCPZ is not electrically connected internally but serves as a thermal and mechanical anchor. It must be soldered to the system ground plane to achieve the specified θJA of 30.4°C/W and ensure reliable solder joint integrity. This connection improves heat dissipation and reduces thermal resistance, critical for maintaining SNR and INL performance under sustained 2.5 MSPS operation.

AD7985BCPZ Specifications

Product attributes
Attribute value
Manufacturer:
Analog Devices Inc.
Series:
PulSAR®
Package/Case:
20-WFQFN Exposed Pad, CSP
Packaging:
Tray
Product Status:
Active
Number of Bits:
16
Sampling Rate (Per Second):
2.5M
Number of Inputs:
1
Input Type:
Pseudo-Differential
Data Interface:
SPI, DSP
Configuration:
S/H-ADC
Ratio - S/H:ADC:
1:1
Number of A/D Converters:
1
Architecture:
SAR
Reference Type:
External, Internal
Voltage - Supply, Analog:
2.375V ~ 2.625V
Voltage - Supply, Digital:
2.375V ~ 2.625V
Features:
-
Operating Temperature:
-40°C ~ 85°C
Supplier Device Package:
20-LFCSP (4x4)
Mounting Type:
Surface Mount
Grade:
-
Qualification:
-

AD7985BCPZ FAQ

1.How can I place an order for AD7985BCPZ through Aetrix?

Please submit a Request for Quotation (RFQ) for AD7985BCPZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AD7985BCPZ reliable?

The price and inventory of AD7985BCPZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD7985BCPZ is usually 5 days.

3.What payment methods are accepted for AD7985BCPZ?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD7985BCPZ transactions.

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AD7985BCPZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AD7985BCPZ order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AD7985BCPZ?

For technical support, including AD7985BCPZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD7985BCPZ requirements.

6.How does Aetrix verify that AD7985BCPZ is sourced from the original manufacturer or authorized distributors?

All AD7985BCPZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD7985BCPZ meets industry standards.

7.What is the process for return or replacement of AD7985BCPZ?

All AD7985BCPZ units undergo pre-shipment inspection (PSI). If there is an issue with AD7985BCPZ, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AD7985BCPZ part is unused and in its original packaging.

Return procedure for AD7985BCPZ:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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