Analog Devices Inc. AD80066KRSZ

Overview

AD80066KRSZ from Analog Devices is a complete 16-bit CCD/CIS analog signal processor with integrated 4-channel correlated double sampling (CDS), programmable gain amplifiers (PGA), offset DACs, and a 24 MSPS ADC. It supports 4-/3-/2-/1-channel operation, selectable 1.5 V or 3 V p-p input range, ±300 mV offset adjustment, and multiplexed 8-bit digital output. It is used in flatbed document scanners for high-fidelity digitization of optical sensor outputs.

For engineers reviewing the AD80066KRSZ datasheet, AD80066KRSZ pinout, AD80066KRSZ application, or AD80066KRSZ equivalent, key selection considerations include channel count flexibility, CDS vs. SHA mode configurability, 16-bit accuracy at 24 MSPS, low-noise PGA performance, and SSOP-28 packaging for space-constrained imaging front-ends.

Technical Context

The AD80066KRSZ implements a fully integrated analog signal chain optimized for linear image sensors: each of its four channels includes an input clamp, CDS amplifier, 9-bit offset DAC, and PGA, all feeding into a shared 16-bit ADC via a configurable 4:1 MUX. Its dual-clock CDS architecture (CDSCLK1 for reference level, CDSCLK2 for data level) enables precise noise cancellation in CCD readout.

Operation is fully software-configurable via a 3-wire serial interface controlling gain (1×–5.9× in 64 steps), offset (−300 mV to +295 mV in 512 steps), input range, output format (byte-muxed or single-byte), and power mode (normal, slow, sleep). Latency is fixed at 3 ADCCLK cycles, and it supports both CDS and sample-and-hold (SHA) modes for compatibility with CIS and CMOS sensors.

Key Specifications

Pinout & Package

AD80066KRSZ is housed in a 28-lead SSOP (Shrink Small Outline Package), 5.3 mm body width, with exposed pad not electrically connected. Pin pitch is 0.65 mm; recommended PCB footprint follows Analog Devices' MS-013AA outline.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar CCD/CIS signal processor applications.

Compared with AD9826ASTZ and TDC1300IPWPR, AD80066KRSZ uniquely combines 4-channel CDS, per-channel gain/offset tuning, and 16-bit accuracy at 24 MSPS-making it the only option supporting high-end CCD-based flatbed and film scanners requiring pixel-perfect noise rejection and calibration headroom.

Availability

AD80066KRSZ is available at Aetrix Electronics and suitable for flatbed document scanners, film scanners, and digital color copiers requiring stable component supply, long-term lifecycle assurance, and traceable sourcing for industrial OEM production.

Supply support for AD80066KRSZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD80066KRSZ belongs to Analog Devices' Imaging Signal Processor product line, engineered specifically for high-fidelity digitization of linear CCD and CIS arrays in professional and industrial scanning equipment.

FAQ

What is the maximum operating temperature range for the AD80066KRSZ?

The AD80066KRSZ has a specified operating temperature range of 0°C to +70°C. This industrial-grade rating ensures reliable performance in enclosed scanner housings where ambient temperatures may rise during extended duty cycles. The device's thermal resistance (θ_JA = 109°C/W) and 490 mW power dissipation require proper PCB copper pour and airflow management to maintain junction temperature below 150°C under worst-case conditions.

Does the AD80066KRSZ support both CCD and CIS sensors?

Yes, the AD80066KRSZ supports both CCD and CIS sensors through dual operational modes: Correlated Double Sampling (CDS) mode for CCDs and Sample-and-Hold (SHA) mode for CIS and CMOS sensors. In CDS mode, CDSCLK1 and CDSCLK2 clocks enable noise cancellation; in SHA mode, CDSCLK1 is grounded and CDSCLK2 serves as the sole sampling clock, with the OFFSET pin used for DC level setting. This flexibility makes AD80066KRSZ suitable across multiple generations of imaging hardware.

How is the 16-bit output formatted on the AD80066KRSZ parallel bus?

The AD80066KRSZ delivers its 16-bit output in multiplexed byte-wide format on D[0:7]. By default, the most significant byte (DB15–DB8) appears on the rising edge of ADCCLK, and the least significant byte (DB7–DB0) appears on the falling edge-requiring two consecutive ADCCLK cycles per pixel. When Bit D4 of the Configuration Register is cleared, the device enters optional single-byte mode, outputting DB15–DB8 and DB7–DB0 sequentially on successive ADCCLK edges without multiplexing, simplifying interface logic at reduced throughput.

Can the AD80066KRSZ operate with a 3 V digital supply while using a 5 V analog supply?

Yes, the AD80066KRSZ supports independent analog and digital supplies: AVDD must be 5 V (4.5–5.25 V), while DRVDD can be either 3 V (3.0–3.3 V) or 5 V (up to 5.25 V). This allows direct interfacing with 3 V FPGAs or microcontrollers without level shifters. Digital output voltage levels scale accordingly-VOH is 2.5 V minimum at 3 V DRVDD-and input thresholds (VIH/VIL) remain compatible with both 3 V and 5 V logic families.

What is the function of the CAPT and CAPB pins on the AD80066KRSZ?

CAPT and CAPB are dedicated analog output pins that provide access to the internal top and bottom reference voltages of the AD80066KRSZ's 16-bit ADC. Each requires a 0.1 µF ceramic decoupling capacitor to ground to stabilize the internal bandgap reference and minimize switching noise. CAPT typically sources ~0.75 V above CAPB, forming the 1.5 V or 3 V full-scale range depending on configuration register settings. These pins are not user-adjustable but are essential for achieving specified INL/DNL performance.