Analog Devices Inc. AD809BRZ-REEL7
- Part No.:
- AD809BRZ-REEL7
- Manufacturer:
- Analog Devices Inc.
- Package:
- 16-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AD809BRZ-REEL7.pdf
- Description:
- IC CLK/FREQ SYNTH 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD809BRZ-REEL7 from Analog Devices is a 155.52 MHz frequency synthesizer IC that generates ECL/PECL-compatible clock outputs from 19.44 MHz or 9.72 MHz reference inputs. It integrates a low-jitter VCO, phase-frequency detector, loop filter, and input multiplexer in a single 16-pin SOIC package, delivering 2.0° RMS output jitter at 90 mW power consumption for SONET/SDH bit-clock generation.
For engineers reviewing the AD809BRZ-REEL7 datasheet, AD809BRZ-REEL7 pinout, AD809BRZ-REEL7 application, or AD809BRZ-REEL7 equivalent, key selection criteria include ×8/×16 synthesis ratio support, PECL/TTL/CMOS input compatibility, 155.52 MHz output stability over –40°C to +85°C, and on-chip loop damping capacitor terminals (CF1/CF2) for configurable PLL dynamics.
Technical Context
The AD809BRZ-REEL7 implements a second-order charge-pump PLL with auto-selecting ×8 or ×16 integer-N frequency multiplication. Its PFD drives an integrated VCO locked to either 19.44 MHz (×8) or 9.72 MHz (×16) references, with loop dynamics adjustable via external CF1/CF2 capacitors determining damping factor ζ.
It features dual-input architecture: TTL/CMOS single-ended input on Pin 10 and differential PECL inputs on Pins 12/13, selected by TTL-level MUX control (Pin 15). Output is differential 155.52 MHz PECL on Pins 4/5, with phase skew of –700 ps (CLKOUTN relative to TTL/CMOSIN) at +27°C and stable tracking across ±20 kHz capture range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Synthesis Frequency | 155.52 MHz output - exact SONET OC-3/STM-1 line rate, no external dividers required |
| Input Reference Options | 19.44 MHz (×8) or 9.72 MHz (×16) - supports both primary SONET/SDH timing standards |
| Output Jitter | 2.0° RMS typical - meets SONET GR-1244-CORE jitter compliance for transmit clocking |
| Power Consumption | 90 mW at +5 V - enables dense clock distribution without thermal derating in telecom line cards |
| Supply Voltage | +5 V or –5.2 V single supply - simplifies power design versus dual-rail alternatives |
| Operating Temperature | –40°C to +85°C - qualified for industrial and outdoor telecom infrastructure environments |
| Output Compatibility | 10 kHz ECL/PECL - directly interfaces with SONET framer and serializer ICs without level-shifting |
Pinout & Package
AD809BRZ-REEL7 is housed in a 16-pin narrow-body SOIC (R-16A) package, 150 mil width, with θJA = 110°C/W. Pin 1 identifier notch is located at top-left per JEDEC MS-012.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| Pin 1 (PECLINN) | Differential PECL reference input (negative) | Accepts 155.52 MHz PECL signal when used in loop-timed recovery mode |
| Pin 2 (PECLIN) | Differential PECL reference input (positive) | Paired with Pin 1 for high-noise-margin reference injection into PLL |
| Pin 4 (CLKOUTN) | Differential PECL clock output (negative) | 155.52 MHz output complementary to Pin 5; phase-skewed –700 ps relative to TTL input |
| Pin 5 (CLKOUT) | Differential PECL clock output (positive) | Main 155.52 MHz output; matches SONET framer input requirements without AC coupling |
| Pin 10 (TTL/CMOSIN) | Single-ended TTL/CMOS reference input | Primary reference path for 19.44/9.72 MHz; internal mux selects this when Pins 12/13 are tied to AVEE |
| Pin 12/13 (CLKINN/CLKIN) | Differential PECL reference input pair | Alternative reference path; active when MUX pin selects PECL mode (TTL logic high) |
| Pin 15 (MUX) | Reference input selection control | TTL-level input: logic "0" selects Pin 10; logic "1" selects Pins 12/13 - enables flexible backplane timing architectures |
| Pin 7/8 (CF1/CF2) | Loop filter damping capacitor terminals | Connect external ceramic capacitor (e.g., 22 nF for ζ = 10) to set PLL bandwidth and jitter transfer peaking |
Key Features
| Feature | Design Value |
|---|---|
| Auto-select ×8/×16 synthesis | Eliminates manual configuration; device locks automatically to 19.44 MHz (×8) or 9.72 MHz (×16) input without external programming |
| Integrated low-jitter VCO | On-die VCO achieves 2.0° RMS jitter at 155.52 MHz - avoids external VCO layout complexity and noise coupling |
| Dual-reference input mux | Hardware-selectable TTL/CMOS (Pin 10) or differential PECL (Pins 12/13) inputs - supports both distributed and recovered timing architectures |
| No external loop components | Only CF1/CF2 capacitor required for full PLL operation - reduces BOM count and board area vs. discrete filter designs |
| Single-supply operation | Operates from +5 V or –5.2 V - compatible with legacy telecom power rails and eliminates need for dual supplies |
Applications
| SONET OC-3 Line Card | Fiber-in-the-Loop Terminal |
|---|---|
|
Use Scenario: Generating transmit bit clock for OC-3 (155.52 Mbps) framer ASIC in central office line card. IC Role / Device Role / Timing Role: Primary frequency synthesizer providing low-jitter 155.52 MHz clock to serializer and multiplexer stages. Use Value: Meets GR-1244-CORE jitter mask with 2.0° RMS output, enabling error-free transmission over 40 km fiber spans. |
Use Scenario: Clock recovery and regeneration in passive optical network (PON) OLT equipment. IC Role / Device Role / Timing Role: Converts recovered 19.44 MHz reference from upstream data into clean 155.52 MHz transmit clock. Use Value: Auto-select ×8 synthesis ensures lock acquisition without firmware intervention during link initialization. |
| SDH STM-1 Backplane | Telecom Timing Module |
|
Use Scenario: Distributing synchronized 155.52 MHz timing across multi-slot SDH shelf via backplane. IC Role / Device Role / Timing Role: Local clock synthesizer receiving 9.72 MHz backplane reference and multiplying to line rate. Use Value: ×16 synthesis mode supports low-frequency backplane distribution, reducing crosstalk and EMI. |
Use Scenario: Standalone timing module for legacy telecom equipment requiring drop-in 155.52 MHz clock source. IC Role / Device Role / Timing Role: Self-contained clock generator with on-chip VCO and configurable loop filtering. Use Value: 16-pin SOIC footprint and single +5 V supply enable direct replacement of aging oscillator modules. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar frequency synthesizer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| LMX2531LQ1770E/NOPB | Higher integration: includes fractional-N PLL, SPI interface, and integrated LDO; 1770 MHz max VCO (requires external divider for 155.52 MHz) | Requires microcontroller configuration and external divide-by-11.4 circuit; not drop-in for AD809BRZ-REEL7's fixed-ratio architecture | Choose when programmable output frequencies or multi-channel synchronization are needed beyond fixed 155.52 MHz |
| ICS8430AM-01LFT | LVDS output instead of PECL; 155.52 MHz fixed output but no ×8/×16 input flexibility; lower jitter (1.2° RMS) but no internal VCO tuning | Designed for clock distribution only - lacks reference mux and loop filter terminals; requires external 155.52 MHz source | Choose when sourcing 155.52 MHz from another synthesizer and only need fanout/buffering with ultra-low jitter |
Compared with LMX2531LQ1770E/NOPB and ICS8430AM-01LFT, the AD809BRZ-REEL7 uniquely combines fixed-ratio ×8/×16 synthesis, dual-reference input mux, and on-chip VCO in a simple 16-pin SOIC - eliminating configuration overhead and external dividers required by alternatives.
Availability
AD809BRZ-REEL7 is available at Aetrix Electronics and suitable for SONET/SDH line cards, fiber-in-the-loop terminals, SDH backplane timing systems, and telecom timing modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AD809BRZ-REEL7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global semiconductor company specializing in high-performance analog, mixed-signal, and digital signal processing technologies for precision instrumentation, communications, and industrial applications.
The AD809BRZ-REEL7 belongs to Analog Devices' telecom timing synthesizer product line, engineered specifically for SONET/SDH bit-clock generation with minimal external components and guaranteed jitter performance across temperature.
FAQ
What reference frequencies does the AD809BRZ-REEL7 accept?
The AD809BRZ-REEL7 accepts two precise reference frequencies: 19.44 MHz for ×8 synthesis and 9.72 MHz for ×16 synthesis. These match SONET OC-3 and SDH STM-1 standards. The device auto-selects the correct multiplication ratio based on input frequency and does not support arbitrary reference inputs.
Does the AD809BRZ-REEL7 require external loop filter components besides capacitors?
No, the AD809BRZ-REEL7 requires only two external ceramic capacitors (CF1 and CF2) to set loop damping - no resistors or inductors are needed. A 22 nF capacitor yields ζ = 10 for optimal jitter transfer; the internal charge-pump PLL and VCO eliminate all other external loop components.
How does the MUX pin (Pin 15) control reference input selection on the AD809BRZ-REEL7?
On the AD809BRZ-REEL7, Pin 15 (MUX) is a TTL-level control: logic low (≤0.8 V) selects the single-ended TTL/CMOS input at Pin 10, while logic high (≥2.0 V) selects the differential PECL inputs at Pins 12/13. This enables hardware-based switching between distributed and recovered timing modes without software.
What is the phase relationship between CLKOUT (Pin 5) and TTL/CMOSIN (Pin 10) on the AD809BRZ-REEL7?
The AD809BRZ-REEL7 exhibits a fixed phase skew: the rising edge of CLKOUT (Pin 5) occurs 700 ps after the rising edge of TTL/CMOSIN (Pin 10) at +27°C. This skew remains stable across temperature (–40°C to +85°C), varying from –1000 ps to –250 ps, enabling predictable timing margin allocation in SERDES interfaces.
Can the AD809BRZ-REEL7 operate from a +3.3 V supply?
No, the AD809BRZ-REEL7 is specified only for +5 V or –5.2 V single-supply operation. Its PECL output stage and internal VCO require the full +5 V rail; operation at +3.3 V is outside absolute maximum ratings and will result in failure to lock or invalid output levels.
AD809BRZ-REEL7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Type:
- Clock/Frequency Synthesizer
- PLL:
- Yes
- Input:
- CMOS, ECL, PECL, TTL
- Output:
- ECL, PECL
- Number of Circuits:
- 1
- Ratio - Input:Output:
- 2:1
- Differential - Input:Output:
- Yes/Yes
- Frequency - Max:
- 155.52MHz
- Divider/Multiplier:
- No/No
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
- Supplier Device Package:
- 16-SOIC
AD809BRZ-REEL7 FAQ
1.How can I place an order for AD809BRZ-REEL7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD809BRZ-REEL7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD809BRZ-REEL7 reliable?
The price and inventory of AD809BRZ-REEL7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD809BRZ-REEL7 is usually 5 days.
3.What payment methods are accepted for AD809BRZ-REEL7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD809BRZ-REEL7 transactions.
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4.How is shipping managed for AD809BRZ-REEL7?
AD809BRZ-REEL7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD809BRZ-REEL7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD809BRZ-REEL7?
For technical support, including AD809BRZ-REEL7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD809BRZ-REEL7 requirements.
6.How does Aetrix verify that AD809BRZ-REEL7 is sourced from the original manufacturer or authorized distributors?
All AD809BRZ-REEL7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD809BRZ-REEL7 meets industry standards.
7.What is the process for return or replacement of AD809BRZ-REEL7?
All AD809BRZ-REEL7 units undergo pre-shipment inspection (PSI). If there is an issue with AD809BRZ-REEL7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD809BRZ-REEL7 part is unused and in its original packaging.
Return procedure for AD809BRZ-REEL7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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