Analog Devices Inc. AD8260ACPZ-WP
- Part No.:
- AD8260ACPZ-WP
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 32-WFQFN Exposed Pad, CSP
- Datasheet:
-
AD8260ACPZ-WP.pdf
- Description:
- IC VARIABLE GAIN 1 CIRC 32LFCSP
- Quantity:
- Payment:

- Shipping:

Inventory:1,039
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Product details
Overview
AD8260ACPZ-WP from Analog Devices is a high-current driver amplifier and digitally programmable variable-gain amplifier (DGA) with 3 dB gain steps, combining a 195 MHz driver stage delivering ±300 mA and a 230 MHz low-noise VGA section. It features differential input for direct DAC interfacing, preset 1.5× driver gain, and operates from 3.3 V single or ±3.3 V dual supplies. It is used in digital AGC systems and Tx/Rx signal chains requiring wide bandwidth and precise gain control.
For engineers reviewing the AD8260ACPZ-WP datasheet, AD8260ACPZ-WP pinout, AD8260ACPZ-WP application, or AD8260ACPZ-WP equivalent, this page provides verified specifications including −3 dB bandwidth (195 MHz driver / 230 MHz VGA), output current (>±300 mA), gain range (−6 dB to +24 dB in 3 dB steps), noise performance (2.4 nV/√Hz input voltage noise), and thermal characteristics (θJA = 47.3°C/W) - all confirmed for the AD8260ACPZ-WP LFCSP-32 package.
Technical Context
The AD8260ACPZ-WP integrates two independent signal paths: a high-current driver amplifier with fixed 1.5× gain and a digitally controlled VGA/preamplifier with 30 dB gain range in 3 dB steps via parallel GNS0–GNS3 interface. The driver supports differential output drive into low-impedance loads (e.g., 50 Ω), while the VGA offers differential output compatible with high-speed ADCs.
It supports single-supply (3.3 V to 10 V) and dual-supply (±3.3 V to ±5 V) operation, with internal VMID buffer for mid-rail reference. Gain accuracy is ±0.15 dB (3σ), response time for full 30 dB gain change is 50 ns, and overload recovery is 50 ns - all measured at 25°C with specified load and supply conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| −3 dB Bandwidth (Driver) | 195 MHz small-signal, enabling RF and broadband analog transmission up to ~100 MHz with minimal roll-off. |
| −3 dB Bandwidth (VGA) | 230 MHz small-signal, supporting high-fidelity receiver front-end operation across IF and baseband bands. |
| Output Current (Driver) | ±310 mA into 1 Ω, sufficient to drive 50 Ω lines, transformers, or capacitive loads without external buffering. |
| Gain Range & Step | −6 dB to +24 dB in precise 3 dB steps (11 codes), enabling accurate digital AGC with <±0.15 dB gain error (3σ). |
| Input Voltage Noise (VGA) | 2.4 nV/√Hz at 10 MHz (shorted input), critical for preserving SNR when amplifying low-level sensor or photodiode signals. |
| Supply Range | 3.3 V to 10 V single supply or ±3.3 V to ±5 V dual supply, allowing flexible integration in mixed-voltage systems. |
| Quiescent Current | 28.3 mA full-enabled (3.3 V), 35 µA chip-disabled - enabling low-power standby in battery-sensitive designs. |
Pinout & Package
The AD8260ACPZ-WP is housed in a 5 mm × 5 mm, 32-lead LFCSP package with exposed pad (EPAD) recommended for soldering to ground plane for thermal and reliability optimization.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| INPP / INPN | Positive/Negative driver amplifier inputs | Differential input accepts direct DAC current-output conversion; supports rail-to-rail input swing up to 2 V p-p. |
| TXOP / TXFB | Driver output / feedback node | High-current output drives low-Z loads; feedback enables precision gain setting via external resistors (e.g., 1kΩ/1.5kΩ). |
| VGAP / VGAN | Positive/negative VGA differential outputs | AC-coupled outputs interface directly to modern low-voltage, high-speed ADCs (e.g., 1.8 V LVDS inputs). |
| GNS0–GNS3 | Parallel gain control inputs (LSB to MSB) | CMOS-compatible logic inputs (1.1 V threshold) select one of 11 gain codes; no external clock required. |
| VPOS / VNEG | Driver amplifier power rails | Separate supply pins allow independent biasing; VNEG tied to GND for single supply, −VPOS for dual supply. |
| PRAI / PRAO | Preamplifier input / output | Single-ended preamp input configurable for inverting/noninverting gain >6 dB using external resistors. |
| VMDO / VMDI | VMID buffer output/input | Provides mid-supply reference (VS/2); VMDI pulled to VNCM disables buffer for external reference or dual-supply use. |
Key Features
| Feature | Design Value |
|---|---|
| Integrated dual-path architecture | Combines high-current driver (±300 mA) and low-noise VGA (2.4 nV/√Hz) in one die - eliminates inter-stage matching and layout complexity. |
| Digital gain control with uniform bandwidth | 30 dB range in 3 dB steps maintains ≤2 ns group delay variation (1–50 MHz), ensuring phase-coherent AGC across gain settings. |
| Flexible supply configuration | Operates from 3.3 V single supply (with VMID) or ±3.3 V dual supply (VMID disabled), enabling negative-going pulse processing (e.g., photodiode signals). |
| Fast enable/disable timing | Driver enable time = 0.2 µs; full chip disable = 20 µs - supports burst-mode transmission and low-duty-cycle power saving. |
| Robust thermal design | LFCSP-32 package with θJA = 47.3°C/W and EPAD soldered to ground plane ensures stable operation at 93 mW quiescent dissipation. |
Applications
| Digital AGC Systems | Transceiver Signal Chain |
|---|---|
|
Use Scenario: Automatic gain control loop in software-defined radio (SDR) receivers adjusting signal level before ADC sampling. IC Role / Device Role / Timing Role: VGA/preamplifier section provides precise 3 dB-step gain control; driver stage buffers and transmits processed signal to antenna interface. Use Value: 230 MHz bandwidth and 2.4 nV/√Hz noise preserve dynamic range; 50 ns gain step response enables real-time AGC correction. |
Use Scenario: Full-duplex or half-duplex communication system with shared analog front-end for transmit and receive paths. IC Role / Device Role / Timing Role: Driver amplifier acts as transmitter output stage; VGA/preamplifier serves as receiver LNA and gain controller. Use Value: Integrated dual-path reduces component count; separate supply domains (VPOS/VNEG vs. VPSR/VNGR) prevent coupling between Tx and Rx sections. |
| Power Line Transceivers | High-Speed Data Acquisition Front-End |
|
Use Scenario: PLC (Power Line Communication) modem transmitting/receiving modulated signals over noisy AC mains wiring. IC Role / Device Role / Timing Role: Driver delivers high-current output to line driver transformer; VGA conditions received signal for demodulation. Use Value: ±300 mA drive capability handles high-impedance line termination; 195 MHz driver bandwidth supports >10 MHz PLC standards (e.g., G3-PLC). |
Use Scenario: Precision data acquisition system digitizing fast transient waveforms from sensors or test equipment. IC Role / Device Role / Timing Role: VGA amplifies low-level sensor output; driver drives ADC input with matched differential signaling. Use Value: Differential VGA output minimizes common-mode noise; 30 dB gain range accommodates varying sensor sensitivities without hardware reconfiguration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-current driver and digitally programmable VGA applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8367ARUZ | Single-path 45 dB linear-in-dB VGA (no integrated driver); 750 MHz bandwidth; requires external output buffer for >100 mA loads. | Best suited for pure receiver gain control where high-current drive is not needed; lacks driver stage and dual-path integration. | Select AD8367ARUZ when only VGA functionality is required and external driver buffering is acceptable. |
| THS3201DGN | High-speed current-feedback amplifier (1.8 GHz GBW); no digital gain control; fixed gain via external resistors; 250 mA output. | Used as standalone driver only; no VGA or digital interface; optimized for ultra-wideband signal conditioning, not AGC loops. | Select THS3201DGN when maximum bandwidth (>500 MHz) and slew rate (>3000 V/µs) are prioritized over programmability and integrated receiver path. |
Compared with AD8260ACPZ-WP, AD8367ARUZ offers higher bandwidth but lacks integrated driver and dual-path architecture, while THS3201DGN delivers superior speed and slew rate but requires external gain control and buffering - making AD8260ACPZ-WP uniquely suited for compact, digitally controlled transceiver front-ends.
Availability
AD8260ACPZ-WP is available at Aetrix Electronics and suitable for digital AGC systems, transceiver signal chains, and power line communication equipment requiring stable component supply, guaranteed long-term availability, and traceable sourcing.
Supply support for AD8260ACPZ-WP includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing technologies, headquartered in Norwood, MA.
The AD8260ACPZ-WP belongs to Analog Devices' high-speed amplifier and programmable gain amplifier product line, designed specifically for demanding RF, communications, and instrumentation applications requiring integrated driver+VGA functionality in a single IC.
FAQ
What is the operating temperature range for the AD8260ACPZ-WP?
The AD8260ACPZ-WP is rated for operation from −40°C to +105°C, making it suitable for industrial and automotive environments where extended thermal stability is required. This range is validated per the device's absolute maximum ratings and electrical specifications tables in Rev. B datasheet, with performance characterized across temperature for parameters including gain error, offset voltage, and bandwidth.
Does the AD8260ACPZ-WP support single-supply operation with AC coupling?
Yes, the AD8260ACPZ-WP supports single-supply operation (3.3 V to 10 V) with internal VMID buffer providing a VS/2 reference. For optimal dynamic range, AC coupling is essential on both input and output paths - especially for the VGA outputs (VGAP/VGAN) and preamplifier input (PRAI) - to block DC offsets and prevent saturation when operating from a single rail.
How is gain controlled on the AD8260ACPZ-WP, and what is the resolution?
The AD8260ACPZ-WP uses a parallel 4-bit interface (GNS0–GNS3) to select gain codes, offering 11 discrete settings from −6 dB to +24 dB in precise 3 dB steps. Gain resolution is exactly 3.0 dB per code, with typical gain law conformance (DNL) of ±0.15 dB and absolute gain error of ±0.15 dB (3σ), as confirmed in Table 1 and Figures 22–24 of the datasheet.
Can the driver and VGA sections be powered independently on the AD8260ACPZ-WP?
Yes - the AD8260ACPZ-WP features separate supply domains: VPOS/VNEG for the driver amplifier, and VPSR/VNGR for the VGA/preamplifier. Additionally, TXEN controls driver enable/disable, and ENBL controls VGA/preamplifier enable/disable, allowing independent power gating. Quiescent current drops to 19.1 mA when only VGA is active and 10.8 mA when only driver is active.
What package type and thermal characteristics does the AD8260ACPZ-WP have?
The AD8260ACPZ-WP is supplied in a 5 mm × 5 mm, 32-lead LFCSP package with exposed pad (CP-32-21 per ordering guide). Its thermal resistance is θJA = 47.3°C/W (zero airflow, JEDEC 4-layer board), θJC = 6.9°C/W, and ΨJT = 0.6°C/W - confirming efficient heat transfer when the EPAD is soldered to a grounded PCB plane with thermal vias.
AD8260ACPZ-WP Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 32-WFQFN Exposed Pad, CSP
- Packaging:
- Tray
- Product Status:
- Active
- Amplifier Type:
- Variable Gain
- Number of Circuits:
- 1
- Output Type:
- Differential
- Slew Rate:
- 730V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 195 MHz
- Current - Input Bias:
- 200 nA
- Voltage - Input Offset:
- -
- Current - Supply:
- 28.3mA
- Current - Output / Channel:
- 310 mA
- Voltage - Supply Span (Min):
- 3.3 V
- Voltage - Supply Span (Max):
- 10 V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-LFCSP (5x5)
AD8260ACPZ-WP FAQ
1.How can I place an order for AD8260ACPZ-WP through Aetrix?
Please submit a Request for Quotation (RFQ) for AD8260ACPZ-WP on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD8260ACPZ-WP reliable?
The price and inventory of AD8260ACPZ-WP are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD8260ACPZ-WP is usually 5 days.
3.What payment methods are accepted for AD8260ACPZ-WP?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD8260ACPZ-WP transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD8260ACPZ-WP?
AD8260ACPZ-WP orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD8260ACPZ-WP order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD8260ACPZ-WP?
For technical support, including AD8260ACPZ-WP datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD8260ACPZ-WP requirements.
6.How does Aetrix verify that AD8260ACPZ-WP is sourced from the original manufacturer or authorized distributors?
All AD8260ACPZ-WP products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD8260ACPZ-WP meets industry standards.
7.What is the process for return or replacement of AD8260ACPZ-WP?
All AD8260ACPZ-WP units undergo pre-shipment inspection (PSI). If there is an issue with AD8260ACPZ-WP, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD8260ACPZ-WP part is unused and in its original packaging.
Return procedure for AD8260ACPZ-WP:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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