Analog Devices Inc. AD8264ACPZ-R7
- Part No.:
- AD8264ACPZ-R7
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 40-WFQFN Exposed Pad, CSP
- Datasheet:
-
AD8264ACPZ-R7.pdf
- Description:
- IC VARIABLE GAIN 4 CIRC 40LFCSP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD8264ACPZ-R7 from Analog Devices is a quad-channel, DC-coupled, linear-in-dB variable gain amplifier (VGA) with integrated differential output buffers. It delivers 235 MHz small-signal bandwidth to the VGA stage, 80 MHz to the differential output, 2.3 nV/√Hz input voltage noise, ±2.5 V to ±5 V dual supply operation, and supports pulse processing in medical ultrasound and radar receivers.
For engineers reviewing the AD8264ACPZ-R7 datasheet, AD8264ACPZ-R7 pinout, AD8264ACPZ-R7 application, or AD8264ACPZ-R7 equivalent, this page provides verified specifications, channel-level gain control interface details, differential output offset adjustment, VOCM common-mode setting, and real-world performance data for high-speed analog signal chains requiring precise gain scaling and low-distortion wideband amplification.
Technical Context
The AD8264ACPZ-R7 integrates four independent channels, each comprising a single-ended input preamp/VGA followed by a 6 dB fixed-gain differential output buffer with VOCM and OFSx controls. Its linear-in-dB gain law (20 dB/V) is implemented via a floating gain interface referenced to GNLO, enabling precise multi-channel calibration using a shared DAC.
Each channel features independent GNHx gain control, matched channel-to-channel gain error (±0.1 to ±0.25 dB), and dc-coupled signal path from IPPx input through VGAx to VOHx/VOLx outputs-enabling direct connection to modern high-speed ADCs without AC coupling or level-shifting circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Small-signal bandwidth (VGAx) | 235 MHz - preserves fidelity of fast pulses up to ~1.5 ns rise time in time-domain applications like PET and radar. |
| Small-signal bandwidth (differential output) | 80 MHz - supports full-scale 2 Vp-p output drive into 500 Ω per side while maintaining phase linearity. |
| Gain range (input to differential output) | 6 dB to 30 dB - enables 24 dB dynamic range adjustment with 20 dB/V scaling for DAC-driven calibration loops. |
| Input voltage noise | 2.3 nV/√Hz - ensures minimal SNR degradation in low-level signal conditioning before ADC digitization. |
| Output-referred noise (30 dB gain) | 72 nV/√Hz - quantifies total noise floor at differential output under maximum gain, critical for ADC interface SNR budgeting. |
| Slew rate (differential output) | 470 V/µs - supports clean 2 Vp-p large-signal step response with <25 ns overload recovery. |
| Supply voltage range | ±2.5 V to ±5 V - allows optimization of dynamic range vs. power: 140 mW/channel at ±3.3 V, 990 mW at ±5 V. |
Pinout & Package
The AD8264ACPZ-R7 is housed in a 40-lead LFCSP package (7 mm × 7 mm, 0.85 mm height) with exposed pad (Pin 0) requiring solder connection to ground plane for RF stability and thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| IPP1–IPP4 | Positive preamp input (x4) | High-impedance (4.2 MΩ), low-capacitance (2 pF) inputs accepting single-ended signals; dc-coupled for baseline preservation. |
| VGA1–VGA4 | VGA output (x4) | Intermediate buffered output stage; drives external circuits or feeds internal differential buffer; 3.5 Ω output impedance. |
| VOH1–VOH4 / VOL1–VOL4 | Differential output (x4) | Complementary outputs with <1 Ω output impedance; support direct coupling to ADCs using VOCM reference matching. |
| GNH1–GNH4 / GNLO | Gain control interface (x4 + reference) | Floating voltage-controlled gain: VGAIN = (GNHx − GNLO); 20 dB/V scaling enables precise DAC-based gain trim. |
| VOCM | Common-mode voltage setpoint | Defines midpoint of VOHx/VOLx differential pair; accepts −1.4 V to +1.4 V, enabling alignment with ADC reference outputs. |
| OFS1–OFS4 | Differential output offset control | Adjusts dc offset at differential output independently per channel; same bandwidth as VGAx for transient integrity. |
| VPOS / VNEG | Bipolar supply rails | Internally tied pairs (Pins 16/35 and 17/34); support ±2.5 V to ±5 V operation for negative pulse amplification (e.g., PMT signals). |
| COMM (Pins 0, 12, 39) | Ground reference | Exposed pad (Pin 0) must be soldered to PCB ground plane; ensures low-inductance return path for RF performance and thermal dissipation. |
Key Features
| Feature | Design Value |
|---|---|
| Quad-channel DC-coupled VGA architecture | Enables simultaneous, independent gain control across four signal paths without blocking capacitors-critical for coherent multichannel systems like phased-array ultrasound. |
| Linear-in-dB gain scaling (20 dB/V) | Allows monotonic, predictable gain adjustment using standard 12-bit DACs; ±0.2 dB gain law conformance over temperature ensures calibration stability. |
| Integrated 6 dB differential output buffer | Provides robust 2 Vp-p drive capability into 500 Ω loads with <1 Ω output impedance and ±1 ns group delay variation-minimizing timing skew in parallel ADC interfaces. |
| Channel-to-channel gain matching | ±0.1 to ±0.25 dB matching within one IC over −40°C to +105°C-supports amplitude coherence in beamforming and interferometric sensing. |
| Low-noise, high-bandwidth front-end | 2.3 nV/√Hz input voltage noise + 235 MHz VGA bandwidth enables high-fidelity amplification of weak, wideband transducer signals without SNR collapse. |
Applications
| Medical Ultrasound Beamforming | Radar Receiver IF Amplification |
|---|---|
Use Scenario: Amplifying echo signals from piezoelectric transducer arrays in real-time B-mode imaging systems. IC Role / Device Role / Timing Role: Quad VGA per receive channel adjusts gain dynamically across depth (time-gain compensation), preserving pulse shape and timing integrity for beam synthesis. Use Value: DC coupling and 235 MHz bandwidth maintain sub-ns edge fidelity; channel matching ensures coherent summation; VOCM alignment eliminates ADC input clipping. |
Use Scenario: Variable gain amplification of intermediate-frequency (IF) signals in pulsed Doppler radar receivers. IC Role / Device Role / Timing Role: VGA stage conditions weak return pulses prior to ADC sampling; differential output drives ADC with matched common-mode levels. Use Value: 80 MHz differential output bandwidth supports >100 MSPS sampling; 470 V/µs slew rate ensures accurate 2 Vp-p pulse capture; low IMD3 (<−49 dBc) preserves target resolution. |
| Positron Emission Tomography (PET) | Industrial Multichannel Data Acquisition |
Use Scenario: Amplifying fast scintillation pulses from photomultiplier tubes (PMTs) or SiPMs in coincidence detection modules. IC Role / Device Role / Timing Role: Bipolar supply operation (±2.5 V to ±5 V) enables amplification of negative-going PMT pulses into grounded loads; dc coupling preserves pulse baseline. Use Value: 25 ns overload recovery prevents pulse pile-up distortion; 2.3 nV/√Hz noise minimizes energy resolution degradation; quad integration reduces board space per detector channel. |
Use Scenario: High-precision, synchronized analog signal conditioning in industrial test equipment with multiple sensor inputs. IC Role / Device Role / Timing Role: Each channel independently scales sensor outputs (e.g., strain gauges, thermocouples) to match ADC full-scale range while maintaining inter-channel amplitude consistency. Use Value: ±0.25 dB channel matching over temperature enables calibrated multi-sensor fusion; OFSx offset trimming compensates for sensor dc offsets without external op-amps. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar variable gain amplifier applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD8367ARUZ | Single-channel, 500 MHz bandwidth, 45 dB gain range, no integrated differential output buffer. | Requires external differential driver for ADC interface; lacks VOCM/OFSx controls and quad integration. | Preferred when higher bandwidth (>235 MHz) and wider gain range are needed, and board space permits discrete output stage design. |
| LMH6401IRGTR | Single-channel, 1.7 GHz bandwidth, 30 dB gain range, integrated 100 Ω differential output driver, but no dc coupling. | AC-coupled only; unsuitable for baseline-sensitive applications like PET or precision DC-offset trimming. | Selected for RF/IF applications above 100 MHz where ac coupling is acceptable and ultra-wide bandwidth is prioritized over dc fidelity. |
Compared with AD8264ACPZ-R7, the AD8367ARUZ offers higher bandwidth but requires external components for differential ADC driving and lacks quad integration, while the LMH6401IRGTR provides superior RF bandwidth but sacrifices dc coupling-making AD8264ACPZ-R7 uniquely suited for multichannel, dc-coupled, time-critical pulse processing.
Availability
AD8264ACPZ-R7 is available at Aetrix Electronics and suitable for medical ultrasound, radar receiver front-ends, and positron emission tomography systems requiring stable component supply, long-term production continuity, and guaranteed traceable sourcing.
Supply support for AD8264ACPZ-R7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD8264ACPZ-R7 belongs to Analog Devices' precision wideband amplifier product line, designed specifically for multichannel, dc-coupled, time-domain signal conditioning in medical imaging, scientific instrumentation, and defense electronics.
FAQ
What is the gain control interface configuration for AD8264ACPZ-R7?
The AD8264ACPZ-R7 uses a floating differential gain control interface: VGAIN = (GNHx − GNLO). Each channel has its own GNHx pin (Pins 13, 14, 37, 38), referenced to the common GNLO pin (Pin 36). This architecture enables precise linear-in-dB gain scaling at 20 dB/V across all four channels of the AD8264ACPZ-R7, with ±0.2 dB conformance over temperature.
Can AD8264ACPZ-R7 drive ADCs directly without external level-shifting?
Yes. The AD8264ACPZ-R7's differential output stage includes VOCM (Pin 15) and OFSx (Pins 18, 19, 32, 33) pins that allow full control of common-mode voltage and dc offset. When VOCM is tied to the ADC's reference output, the AD8264ACPZ-R7 achieves perfect dc matching-eliminating the need for external level-shifters or ac-coupling capacitors in high-speed data acquisition systems.
What is the maximum operating temperature range for AD8264ACPZ-R7?
The AD8264ACPZ-R7 is specified for continuous operation from −40°C to +105°C. At supplies greater than ±3.3 V, the upper limit is restricted to +85°C per the datasheet. All key parameters-including gain matching (±0.25 dB), gain law conformance (±0.3 dB), and noise performance-are guaranteed across the full −40°C to +105°C range for AD8264ACPZ-R7.
How does AD8264ACPZ-R7 handle overload recovery?
The AD8264ACPZ-R7 recovers from large overloads in 25 ns when stepping from 0.1 Vp-p to 1 Vp-p input at full gain. This fast recovery is enabled by its fully dc-coupled architecture and optimized internal biasing, preventing pulse pile-up distortion in time-critical applications such as PET coincidence timing and radar pulse detection using the AD8264ACPZ-R7.
Is the exposed pad of AD8264ACPZ-R7 electrically connected?
Yes-the exposed pad (Pin 0) of the AD8264ACPZ-R7 is internally connected to the COMM ground net and must be soldered to the PCB ground plane. This connection is mandatory for proper RF grounding, thermal dissipation (θJA = 31.0°C/W), and reliability; failure to connect it risks degraded high-frequency performance and parametric shift in the AD8264ACPZ-R7.
AD8264ACPZ-R7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 40-WFQFN Exposed Pad, CSP
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Amplifier Type:
- Variable Gain
- Number of Circuits:
- 4
- Output Type:
- Differential
- Slew Rate:
- 380V/µs
- Gain Bandwidth Product:
- -
- -3db Bandwidth:
- 235 MHz
- Current - Input Bias:
- 5 µA
- Voltage - Input Offset:
- -
- Current - Supply:
- 99mA
- Current - Output / Channel:
- -
- Voltage - Supply Span (Min):
- 4.5 V
- Voltage - Supply Span (Max):
- 10 V
- Operating Temperature:
- -40°C ~ 105°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 40-LFCSP-WQ (6x6)
AD8264ACPZ-R7 FAQ
1.How can I place an order for AD8264ACPZ-R7 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD8264ACPZ-R7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD8264ACPZ-R7 reliable?
The price and inventory of AD8264ACPZ-R7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD8264ACPZ-R7 is usually 5 days.
3.What payment methods are accepted for AD8264ACPZ-R7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD8264ACPZ-R7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD8264ACPZ-R7?
AD8264ACPZ-R7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD8264ACPZ-R7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD8264ACPZ-R7?
For technical support, including AD8264ACPZ-R7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD8264ACPZ-R7 requirements.
6.How does Aetrix verify that AD8264ACPZ-R7 is sourced from the original manufacturer or authorized distributors?
All AD8264ACPZ-R7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD8264ACPZ-R7 meets industry standards.
7.What is the process for return or replacement of AD8264ACPZ-R7?
All AD8264ACPZ-R7 units undergo pre-shipment inspection (PSI). If there is an issue with AD8264ACPZ-R7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD8264ACPZ-R7 part is unused and in its original packaging.
Return procedure for AD8264ACPZ-R7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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