Analog Devices Inc. AD831APZ

Overview

AD831APZ from Analog Devices is a monolithic doubly balanced RF mixer IC with +24 dBm output-referred third-order intercept (IP3), –10 dBm LO drive requirement, and dual 500 MHz RF/LO bandwidths. It delivers differential current IF output (250 MHz) and single-ended voltage IF output (>200 MHz), supporting DC-coupled operation on ±4.5 V to ±5.5 V dual supplies or 9 V to 11 V single supply. It is used in high-performance downconversion, direct-to-baseband, and I/Q demodulation in ultrasound imaging and DMR base stations.

For engineers reviewing the AD831APZ datasheet, AD831APZ pinout, AD831APZ application, or AD831APZ equivalent, key selection criteria include its programmable bias for dynamic range vs. power tradeoff, absence of insertion loss, 10.3 dB SSB noise figure at 70 MHz, and compatibility with transformer- or capacitor-coupled IF interfaces in RF front-end designs.

Technical Context

The AD831APZ integrates a Class-A voltage-to-current RF converter, a low-noise limiting LO amplifier, a differential mixer core, and a user-configurable output amplifier. Its RF and LO inputs accept DC coupling and operate up to 500 MHz, while the IF output offers two paths: open-collector differential current (IFP/IFN) and single-ended voltage (OUT/VFB) with gain set by external resistors.

Port isolation is architecture-dependent: LO-to-RF exceeds 70 dB at 100 MHz, RF-to-IF reaches 45 dB, and LO-to-IF is 30 dB - enabling high-fidelity signal separation in image-reject and quadrature architectures. Bias programming via the BIAS pin adjusts quiescent current from 100 mA (full performance) to ~45 mA (reduced IP3/1 dB compression).

Key Specifications

Pinout & Package

AD831APZ is housed in a 20-lead Plastic Leaded Chip Carrier (PLCC) package per JEDEC MO-047-AA, with exposed thermal pad not electrically connected. Pin 1 identifier located at top-left corner of top view; pins numbered counterclockwise from pin 1.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar RF mixer applications.

Compared with LT5560IMS#TRPBF and MAX2022ETX+, the AD831APZ uniquely supports DC-coupled operation, user-adjustable bias, and dual IF output formats - making it the only option among the three suitable for zero-IF ultrasound and precision image-reject receivers requiring full signal path control.

Availability

AD831APZ is available at Aetrix Electronics and suitable for ultrasound imaging systems, DMR base station transceivers, image-reject receivers, and I/Q modulator/demodulator designs requiring stable component supply and long-term production continuity.

Supply support for AD831APZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers worldwide and ISO 9001-certified manufacturing.

The AD831 product line was developed specifically for high-linearity, wide-dynamic-range RF mixing in communications, medical imaging, and test equipment - emphasizing DC coupling, low noise, and flexible power/performance scaling.

FAQ

What is the recommended LO drive level for optimal performance of the AD831APZ?

The AD831APZ achieves its specified +24 dBm IP3 and +10 dBm 1 dB compression point with –10 dBm differential LO drive. At frequencies below 100 MHz, –20 dBm may suffice, but above 100 MHz, –10 dBm is required to ensure full performance. The internal LO limiting amplifier converts this input into a clean square wave to drive the mixer core.

Can the AD831APZ operate with DC-coupled RF, LO, and IF interfaces?

Yes, the AD831APZ supports true DC coupling on all ports when powered from ±5 V dual supplies. Its RF and LO inputs accept common-mode voltages from ±1 V, and the IF outputs (both differential current and single-ended voltage) are referenced to ground or COM, enabling zero-IF and direct-conversion architectures without blocking capacitors.

How does the BIAS pin affect the performance of the AD831APZ?

The BIAS pin on the AD831APZ controls quiescent current: leaving it open yields 100–125 mA for full IP3 and compression performance; connecting it to VP reduces current to ~45 mA, lowering power consumption at the expense of reduced IP3 and 1 dB compression point. This allows real-time tradeoffs between dynamic range and thermal budget in battery-powered or dense-layout systems.

What is the function of pins AN and AP on the AD831APZ?

Pins AN and AP on the AD831APZ are internal amplifier inputs connected directly to the IFN and IFP differential current outputs when the integrated output amplifier is enabled. They are not intended for external connection - the amplifier's gain and offset are set solely via the OUT–VFB feedback loop and the COM reference node.

Does the AD831APZ require external termination resistors on its RF and LO inputs?

No, the AD831APZ does not require external termination resistors on RF or LO inputs. Its RF input presents 1.3 kΩ differential resistance and 2 pF capacitance; LO input is 500 Ω differential. For 50 Ω source matching, an external impedance-matching network (e.g., shunt-series L-C) is typically used - not a simple 50 Ω resistor - to preserve bandwidth and minimize reflection.