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Home > Products > Integrated Circuits (ICs) > Linear > Special Purpose Amplifiers

Analog Devices Inc. AD8332ARU

Name: AD8332ARU
Brand: Analog Devices Inc.
SKU: AD8332ARU
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: AD8332ARU

Manufacturer:: Analog Devices Inc.

Category:: Special Purpose Amplifiers

Package:: 28-TSSOP (0.173", 4.40mm Width)

Datasheet:: AD8332ARU.pdf

Description:: IC VGAIN AMP 28TSSOP

Quantity:: RFQ Add To RFQ list

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Product details

Overview

AD8332ARU from Analog Devices is a dual-channel, ultralow-noise, linear-in-dB variable gain amplifier (VGA) with integrated preamplifier and programmable input impedance. It delivers 19 dB LNA gain, 48 dB VGA gain range (−4.5 dB to +43.5 dB in LO mode), 100 MHz bandwidth, and 40 nV/√Hz output-referred noise at 0.5 V gain control voltage-optimized for ultrasound time-gain control and high-speed ADC driver applications.

For engineers reviewing the AD8332ARU datasheet, AD8332ARU pinout, AD8332ARU application, or AD8332ARU equivalent, key selection criteria include differential signal path integrity, active R_IN matching via external resistor, selectable 3.5 dB/15.5 dB postamp gain, user-configurable output clamping, and −40°C to +85°C industrial operation with TSSOP-28 packaging.

Technical Context

The AD8332ARU integrates two fully independent signal chains, each comprising an ultralow-noise LNA (0.74 nV/√Hz voltage noise, 2.5 pA/√Hz current noise), a 48 dB X-AMP® VGA with precise 50 dB/V linear-in-dB gain scaling, and a pin-selectable postamplifier (3.5 dB or 15.5 dB). Each channel supports differential outputs, common-mode voltage control (VCM), and independent enable (ENB), gain slope (MODE), and gain range (HILO) logic interfaces.

Its architecture enables stable gain control across frequency (±2 ns group delay variation from 5–50 MHz), low crosstalk (−98 dB channel-to-channel), and fast overload recovery (5 ns). Input impedance is actively matched using external R_IZ resistors (50 Ω to 6 kΩ), preserving noise performance while enabling direct interface to transducers or sensors without external matching networks.

Key Specifications

Parameter	Value and Actual Design Meaning
LNA Voltage Noise	0.74 nV/√Hz - Enables sub-4 dB noise figure with 50 Ω source, critical for weak-signal ultrasound front-ends.
VGA Bandwidth	100 MHz - Supports wideband I/Q processing and 10+ MSPS ADC driving up to 12-bit resolution.
Gain Range	−4.5 dB to +43.5 dB (LO mode); 7.5 dB to 55.5 dB (HI mode) - Covers dynamic range requirements of AGC loops in sonar and medical imaging.
Output-Referred Noise	40 nV/√Hz (LO mode, VGAIN = 0.5 V) - Minimizes added noise when driving 10-bit/12-bit differential ADCs.
Channel Crosstalk	−98 dB - Ensures isolation between dual channels in I/Q or multi-beam ultrasound systems.
Overload Recovery	5 ns - Prevents signal corruption during transient events in pulsed-echo applications like ultrasound TGC.
Supply Voltage	4.5 V to 5.5 V - Single 5 V rail simplifies power design and aligns with standard ADC and FPGA supply domains.

Pinout & Package

AD8332ARU is packaged in a 28-lead TSSOP (RU package) with exposed thermal pad requiring PCB ground connection for optimal thermal dissipation, noise performance, and mechanical reliability.

Pin/Terminal	Circuit Role	Design Meaning
INH1, INH2	Single-ended LNA inputs	Accepts low-level transducer signals; impedance set by external R_IZ without degrading noise floor.
LOP1/LOP2, LON1/LON2	Differential LNA outputs	Drive VGA stage with 19 dB gain and 130 MHz small-signal bandwidth; low 5 Ω output impedance.
VIP1/VIP2, VIN1/VIN2	Differential VGA inputs	Accept LNA outputs or external signals; support active termination matching for minimal reflections.
VOH1/VOH2, VOL1/VOL2	Differential VGA outputs	Deliver clamped, gain-adjusted signals to ADCs; support ±1.125 V swing around VCM with 1 Ω output impedance.
GAIN	Analog gain control input	0–1.0 V input sets gain with 50 dB/V scaling; 10 MΩ input impedance avoids loading external DACs or filters.
HILO	Gain range select	Logic-high selects HI mode (7.5–55.5 dB); logic-low selects LO mode (−4.5–+43.5 dB) for dynamic range optimization.
RCLMP	Clamp level setting	External resistor defines output voltage limit to prevent ADC saturation; accuracy ±50 mV (LO), ±75 mV (HI).
ENB	Global enable	Active-high logic disables both LNA and VGA; <1 µA shutdown current preserves system power budget.

Key Features

Feature	Design Value
Ultralow-noise LNA	0.74 nV/√Hz voltage noise + 2.5 pA/√Hz current noise enables <4 dB NF with 50 Ω sources-critical for ultrasound front-end sensitivity.
Programmable input impedance	Adjustable R_IN (50 Ω to 6 kΩ) via single external resistor maintains optimal noise match across diverse transducer impedances without discrete matching networks.
Dual-channel independence	−98 dB inter-channel crosstalk and separate VCM/GAIN/ENB pins allow true isolated I/Q paths or parallel beamforming channels.
Selectable postamp gain	3.5 dB or 15.5 dB pin-selectable gain optimizes SNR vs. full-scale headroom trade-off for 10-bit or 12-bit ADC interfacing.
User-defined output clamping	External R_CLMP sets precise output voltage limit (±50 mV accuracy in LO mode), preventing ADC overdrive during echo bursts.

Applications

Ultrasound Time-Gain Control (TGC)	I/Q Signal Processing
Use Scenario: Amplifying weak, depth-dependent echo signals from piezoelectric transducers in medical B-mode or Doppler imaging systems. IC Role / Device Role / Timing Role: Dual-channel VGA providing real-time, logarithmic gain ramping per scan line; LNA matches transducer impedance while preserving SNR. Use Value: 100 MHz bandwidth and 5 ns overload recovery ensure fidelity across full imaging depth; programmable R_IN adapts to 50–200 Ω transducers without redesign.	Use Scenario: Conditioning in-phase and quadrature baseband signals in software-defined radio or radar receivers. IC Role / Device Role / Timing Role: Two synchronized, isolated gain paths maintaining phase coherence and amplitude balance between I and Q channels. Use Value: −98 dB crosstalk and matched gain error (±0.1 dB) preserve image rejection ratio; differential outputs suppress common-mode interference.
High-Speed Dual ADC Driver	AGC System Front-End
Use Scenario: Driving 10-bit/12-bit, 20+ MSPS differential ADCs in data acquisition or test equipment. IC Role / Device Role / Timing Role: Postamplifier gain selection (3.5 dB or 15.5 dB) scales output to match ADC input range while minimizing added noise. Use Value: 40 nV/√Hz output-referred noise and ±1.125 V output swing maximize effective number of bits (ENOB) without external amplification.	Use Scenario: Implementing closed-loop automatic gain control in sonar, spectrum analyzers, or optical receiver modules. IC Role / Device Role / Timing Role: Linear-in-dB VGA with 50 dB/V gain control interface enables precise, temperature-stable AGC loop response. Use Value: ±0.3 dB gain law conformance (0.1–0.95 V) and 500 ns response time support stable, jitter-free AGC settling in real-time systems.

Ultrasound Time-Gain Control (TGC)

I/Q Signal Processing

Use Scenario: Amplifying weak, depth-dependent echo signals from piezoelectric transducers in medical B-mode or Doppler imaging systems.

IC Role / Device Role / Timing Role: Dual-channel VGA providing real-time, logarithmic gain ramping per scan line; LNA matches transducer impedance while preserving SNR.

Use Value: 100 MHz bandwidth and 5 ns overload recovery ensure fidelity across full imaging depth; programmable R_IN adapts to 50–200 Ω transducers without redesign.

Use Scenario: Conditioning in-phase and quadrature baseband signals in software-defined radio or radar receivers.

IC Role / Device Role / Timing Role: Two synchronized, isolated gain paths maintaining phase coherence and amplitude balance between I and Q channels.

Use Value: −98 dB crosstalk and matched gain error (±0.1 dB) preserve image rejection ratio; differential outputs suppress common-mode interference.

High-Speed Dual ADC Driver

AGC System Front-End

Use Scenario: Driving 10-bit/12-bit, 20+ MSPS differential ADCs in data acquisition or test equipment.

IC Role / Device Role / Timing Role: Postamplifier gain selection (3.5 dB or 15.5 dB) scales output to match ADC input range while minimizing added noise.

Use Value: 40 nV/√Hz output-referred noise and ±1.125 V output swing maximize effective number of bits (ENOB) without external amplification.

Use Scenario: Implementing closed-loop automatic gain control in sonar, spectrum analyzers, or optical receiver modules.

IC Role / Device Role / Timing Role: Linear-in-dB VGA with 50 dB/V gain control interface enables precise, temperature-stable AGC loop response.

Use Value: ±0.3 dB gain law conformance (0.1–0.95 V) and 500 ns response time support stable, jitter-free AGC settling in real-time systems.

Equivalent & Alternatives

The following parts are listed as comparable options for similar variable gain amplifier applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AD8336ACPZ-R7	Single-channel, 120 MHz bandwidth, 0.95 nV/√Hz input noise, 32-lead LFCSP only.	Higher bandwidth but no dual-channel integration; lacks programmable R_IN and clamping.	Preferred for single-path, higher-frequency (>100 MHz) designs where space allows discrete channel duplication.
LMH6401IRGTR	Single-channel, 1.7 GHz bandwidth, 1.3 nV/√Hz noise, digital SPI gain control, no integrated LNA.	Wider bandwidth but higher noise and no preamp; requires external LNA and matching network.	Used when >500 MSPS sampling or RF IF gain control is needed, not for low-noise analog front-ends.

Compared with AD8332ARU, AD8336ACPZ-R7 offers higher bandwidth but sacrifices dual-channel integration and active input matching, while LMH6401IRGTR trades ultralow noise and analog simplicity for digital control and RF-range operation-neither provides the same combination of dual-channel, LNA+VGA+clamping, and programmable R_IN in one RU-package device.

Availability

AD8332ARU is available at Aetrix Electronics and suitable for ultrasound imaging systems, I/Q demodulator front-ends, and high-speed dual-channel data acquisition requiring stable component supply, long-term lifecycle support, and traceable sourcing.

Supply support for AD8332ARU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with engineering expertise spanning precision instrumentation, RF, and signal conditioning.

The AD833x family was designed specifically for low-noise, wideband variable gain applications in medical ultrasound, sonar, and communications-emphasizing integrated LNA-VGA-postamp signal chains with programmable interface flexibility.

FAQ

What is the operating temperature range for the AD8332ARU?

The AD8332ARU is specified for continuous operation from −40°C to +85°C ambient temperature. This industrial-grade range supports deployment in ultrasound scanners, portable diagnostic equipment, and outdoor sonar systems without derating. Thermal performance is enhanced by the exposed pad in its TSSOP-28 package, which must be soldered to PCB ground for optimal heat dissipation and noise immunity.

How does the AD8332ARU achieve programmable input impedance without degrading noise performance?

The AD8332ARU uses an active impedance synthesis technique where an external resistor (R_IZ) connected to the LMD pins sets the effective input resistance-from 50 Ω to 6 kΩ-while maintaining the ultralow 0.74 nV/√Hz voltage noise floor. Unlike passive matching networks, this method avoids added thermal noise and insertion loss, preserving signal-to-noise ratio across all configured impedances.

Can the AD8332ARU drive a 12-bit ADC directly, and what postamp gain should be used?

Yes, the AD8332ARU can directly drive 12-bit differential ADCs. For optimal ENOB, use the 3.5 dB postamp gain setting (HILO = LO) to minimize output-referred noise (40 nV/√Hz) while delivering ±1.125 V differential swing into ≥500 Ω loads-matching typical 12-bit ADC full-scale ranges without clipping or excessive headroom loss.

What is the purpose of the RCLMP pin on the AD8332ARU, and how is it configured?

The RCLMP pin on the AD8332ARU sets the output clamping voltage level via an external resistor to ground. In LO gain mode, a 2.74 kΩ resistor yields ±50 mV accuracy at 1 V_p-p clamped output; in HI mode, 2.21 kΩ achieves ±75 mV accuracy. This prevents ADC saturation during high-amplitude echo bursts in ultrasound TGC applications without requiring external diode clamps.

Does the AD8332ARU support independent gain control for each channel?

No-the AD8332ARU shares a single GAIN pin for both channels, ensuring synchronized gain adjustment across the dual signal paths. This is intentional for applications like I/Q processing or beamforming where channel-to-channel gain matching (±0.1 dB) and phase coherence are essential. Independent control would require two discrete AD8331 devices or a different architecture.

AD8332ARU Specifications

Product attributes: Attribute value

Manufacturer:: Analog Devices Inc.

Series:: X-AMP®

Package/Case:: 28-TSSOP (0.173", 4.40mm Width)

Packaging:: Tube

Product Status:: Obsolete

Type:: Variable Gain Amplifier

Applications:: Signal Processing

Mounting Type:: Surface Mount

Grade:: -

Qualification:: -

Supplier Device Package:: 28-TSSOP

AD8332ARU FAQ

1.How can I place an order for AD8332ARU through Aetrix?

Please submit a Request for Quotation (RFQ) for AD8332ARU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AD8332ARU reliable?

The price and inventory of AD8332ARU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD8332ARU is usually 5 days.

3.What payment methods are accepted for AD8332ARU?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD8332ARU transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AD8332ARU?

AD8332ARU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AD8332ARU order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AD8332ARU?

For technical support, including AD8332ARU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD8332ARU requirements.

6.How does Aetrix verify that AD8332ARU is sourced from the original manufacturer or authorized distributors?

All AD8332ARU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD8332ARU meets industry standards.

7.What is the process for return or replacement of AD8332ARU?

All AD8332ARU units undergo pre-shipment inspection (PSI). If there is an issue with AD8332ARU, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AD8332ARU part is unused and in its original packaging.

Return procedure for AD8332ARU:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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