Analog Devices Inc. AD842JRZ-16
- Part No.:
- AD842JRZ-16
- Manufacturer:
- Analog Devices Inc.
- Category:
- Instrumentation, Op Amps, Buffer Amps
- Package:
- 16-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AD842JRZ-16.pdf
- Description:
- IC OPAMP GP 1 CIRCUIT 16SOIC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AD842JRZ-16 from Analog Devices is a wideband, high-output-current operational amplifier optimized for precision high-speed signal conditioning. It delivers 80 MHz gain bandwidth, 375 V/µs slew rate, and settles to 0.01% in 100 ns for a 10 V step-enabling use in 12-bit data acquisition systems, video line drivers, and DAC/ADC buffer stages.
For engineers reviewing the AD842JRZ-16 datasheet, AD842JRZ-16 pinout, AD842JRZ-16 application, or AD842JRZ-16 equivalent, key selection criteria include guaranteed 100 mA output drive into 499 Ω, ±15 V operation with 14 mA max quiescent current, low 9 nV/√Hz input voltage noise, and SOIC_W (RW-16) package compatibility with high-density PCB layouts.
Technical Context
The AD842JRZ-16 employs Analog Devices' junction-isolated complementary bipolar (CB) process, enabling simultaneous dc precision and ac performance unattainable in earlier monolithic op amps. Its fully differential input stage ensures stable operation at gains ≥2, while internal compensation eliminates external phase compensation requirements.
Designed for demanding transient fidelity, the device achieves sub-100 ns linear settling via minimized transistor isolation capacitance discharge and thermally stable biasing-critical for pulse amplification and fast-settling active filters where overshoot and settling tails degrade system accuracy.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Gain bandwidth product | 80 MHz at gain = 2 - supports closed-loop bandwidth up to 40 MHz in unity-gain-stable configurations with minimal phase margin degradation. |
| Slew rate | 375 V/µs - enables full-scale ±10 V output swing at 6 MHz without slewing distortion in video and pulse applications. |
| Settling time | 100 ns to 0.01% for 10 V step - meets timing budget for 12-bit ADC/DAC buffering with <1 LSB error after settling. |
| Output current | 100 mA minimum into 499 Ω - drives terminated 50 Ω/75 Ω coaxial lines or low-impedance active filter stages without external boost. |
| Input voltage noise | 9 nV/√Hz at 1 kHz - preserves SNR in high-gain sensor interfaces and precision instrumentation front-ends. |
| Input offset voltage | 1.5 mV maximum - laser-wafer trimmed; eliminates need for external nulling in most line driver and buffer applications. |
| Quiescent current | 14 mA maximum at ±15 V - balances power efficiency with high-speed performance in continuous-operation systems. |
Pinout & Package
AD842JRZ-16 is housed in a 16-lead SOIC_W (RW-16) package with 1.27 mm lead pitch, 10.5 mm × 7.6 mm body size, and exposed thermal pad-compatible footprint per JEDEC MS-013-AA. Thermal resistance θJA = 100°C/W enables operation up to +70°C ambient without forced airflow.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | BALANCE | Offset null adjustment terminal; connects to external potentiometer wiper for fine-tuning input offset voltage. |
| 2 | –INPUT | Inverting input node; differential pair base connection with 100 kΩ input resistance and 2 pF capacitance. |
| 3 | +INPUT | Noninverting input node; matched to Pin 2 for common-mode rejection >86 dB up to 10 kHz. |
| 4 | V– | Negative supply rail connection; must be bypassed with 2.2 µF + 0.1 µF ceramic capacitor near pin. |
| 5 | NIC | Not internally connected - no electrical function; left floating or grounded per layout best practices. |
| 6 | OUTPUT | Class-AB output stage emitter follower; capable of sourcing/sinking 100 mA with <5 Ω open-loop output impedance. |
| 7 | NIC | Not internally connected - no electrical function; avoid routing critical signals adjacent to this pin. |
| 8 | NIC | Not internally connected - no electrical function; maintains symmetry in SOIC_W thermal profile. |
| 9 | NIC | Not internally connected - no electrical function; designated as NC in all revision F documentation. |
| 10 | NIC | Not internally connected - no electrical function; matches PDIP/CERDIP pinout mapping for design reuse. |
| 11 | NIC | Not internally connected - no electrical function; reserved for future process enhancements. |
| 12 | NIC | Not internally connected - no electrical function; electrically isolated from die substrate. |
| 13 | NIC | Not internally connected - no electrical function; no bond wire attachment per metalization photograph. |
| 14 | NIC | Not internally connected - no electrical function; confirmed NIC in Figure 2 and Table 1 footnotes. |
| 15 | V+ | Positive supply rail connection; requires local 2.2 µF + 0.1 µF bypassing to minimize supply-induced distortion. |
| 16 | BALANCE | Second offset null terminal; used with Pin 1 in dual-potentiometer configuration for ultra-low residual offset. |
Key Features
| Feature | Design Value |
|---|---|
| High slew rate + fast settling | 375 V/µs slew rate and 100 ns 0.01% settling enable accurate reproduction of fast-rising video pulses and digital-to-analog transitions. |
| Laser-trimmed input offset | 1.5 mV max offset voltage eliminates manual nulling circuitry in line driver and buffer designs, reducing BOM count and board area. |
| Differential input architecture | Full differential inputs provide 86 dB CMRR at ±10 V common-mode range, ensuring robustness against ground bounce in mixed-signal systems. |
| Capacitive load tolerance | Stable driving of ≤20 pF loads without external compensation - simplifies layout for PCB traces and ADC input capacitors. |
| High output current capability | 100 mA min output current supports direct driving of 50 Ω/75 Ω transmission lines and active filter feedback networks without external buffers. |
Applications
| Video Line Driver | DAC Output Buffer |
|---|---|
Use Scenario: Driving 75 Ω coaxial cable in broadcast-quality analog video equipment with minimal group delay variation across 4.4 MHz bandwidth. IC Role / Device Role / Timing Role: High-fidelity voltage buffer with low differential gain (0.015%) and phase error (0.035°) at 4.4 MHz. Use Value: Maintains color fidelity and sync integrity over long cable runs without requiring post-amplifier equalization. | Use Scenario: Isolating and amplifying output of 12-bit DAC in automated test equipment requiring sub-LSB settling accuracy. IC Role / Device Role / Timing Role: Precision gain-of-1 buffer with 100 ns 0.01% settling guaranteeing full-scale transition completion before next sample clock edge. Use Value: Enables 1 MSPS effective sampling rate in closed-loop control systems without aperture uncertainty penalties. |
| ADC Input Driver | Pulse Amplifier |
Use Scenario: Conditioning fast transient signals from photodiode arrays prior to sampling by 10+ MS/s pipeline ADCs. IC Role / Device Role / Timing Role: Wideband gain stage with 9 nV/√Hz input noise and 80 MHz GBW preserving dynamic range up to Nyquist frequency. Use Value: Maximizes ENOB by minimizing added noise and distortion during signal chain front-end amplification. | Use Scenario: Amplifying nanosecond-scale laser trigger pulses in time-of-flight measurement systems. IC Role / Device Role / Timing Role: Fast-settling inverting amplifier with 80 ns 0.1% settling and no observable settling tails per Figure 31. Use Value: Eliminates timing jitter caused by residual output voltage drift, improving distance resolution below 1 cm. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar high-speed op amp applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| OPA695ID | Higher 1.7 GHz GBW but lower 65 mA output current; 12.5 mA quiescent current; requires external compensation for stability at gains <3. | Better suited for RF IF amplification; less ideal for DC-coupled line driving due to lower output drive and gain-dependent stability. | Select OPA695ID only when >500 MHz small-signal bandwidth is required and load impedance exceeds 150 Ω. |
| LMH6702MA | 320 V/µs slew rate, 1.8 GHz GBW, 105 mA output; higher 16.5 mA quiescent current; 12 nV/√Hz input noise. | Superior RF performance but increased noise compromises precision DC-coupled applications like DAC buffering. | Choose LMH6702MA for wideband AC-coupled signal chains where noise floor is secondary to bandwidth. |
Compared with OPA695ID and LMH6702MA, the AD842JRZ-16 provides optimal balance of 100 mA output drive, 9 nV/√Hz noise, and guaranteed 0.01% settling in 100 ns-making it uniquely suitable for DC-coupled, high-fidelity line driving and data acquisition buffer roles where both precision and speed are mandatory.
Availability
AD842JRZ-16 is available at Aetrix Electronics and suitable for video instrumentation, high-speed data acquisition, and precision analog interface applications requiring stable component supply across industrial and test equipment lifecycles.
Supply support for AD842JRZ-16 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD842JRZ-16 belongs to Analog Devices' precision high-speed op amp product line, engineered specifically for applications demanding simultaneous wide bandwidth, low noise, high output current, and fast settling-such as video, instrumentation, and data conversion systems.
FAQ
What is the maximum operating temperature for the AD842JRZ-16?
The AD842JRZ-16 is rated for operation from 0°C to +70°C ambient temperature, consistent with its commercial-grade SOIC_W (RW-16) packaging and JEDEC MS-013-AA compliance. Its thermal characteristics specify θJA = 100°C/W, allowing safe operation at full 14 mA quiescent current and 100 mA output load within this range without heatsinking. Exceeding +70°C ambient may cause parametric shift beyond datasheet limits.
Does the AD842JRZ-16 require external compensation for unity-gain stability?
No, the AD842JRZ-16 is internally compensated and stable at gains of 2 or greater. It is not unity-gain stable; attempting unity-gain operation risks oscillation due to phase margin erosion. For gain-of-1 applications, use a minimum noise-gain configuration (e.g., gain-of-2 with resistive divider feedback) or select a unity-gain-stable alternative such as the AD8001. The datasheet explicitly states "Stable at gains of 2 or greater" as a core feature.
Can the AD842JRZ-16 drive a 50 Ω load directly?
Yes, the AD842JRZ-16 can drive a 50 Ω load directly: its 100 mA minimum output current specification guarantees ±5 V output into 50 Ω (per Terminated Line Driver section), and Figure 32 confirms operation in doubly terminated 50 Ω/75 Ω cable configurations. However, sustained full-scale output into 50 Ω increases power dissipation-thermal design must ensure junction temperature remains below 150°C using the SOIC_W package's θJA = 100°C/W rating.
What is the purpose of the BALANCE pins on the AD842JRZ-16?
The BALANCE pins (Pins 1 and 16) on the AD842JRZ-16 provide access to the amplifier's internal offset null network. Connecting a 10 kΩ potentiometer between these pins-with its wiper tied to V–-allows precise adjustment of input offset voltage down to sub-millivolt levels. This feature eliminates external nulling circuitry in applications sensitive to dc error, such as precision line drivers and calibrated sensor interfaces, as confirmed in the Offset Nulling section (Figure 28) and Product Highlights.
How does capacitive loading affect the AD842JRZ-16's stability?
The AD842JRZ-16 is designed to drive capacitive loads up to 20 pF without performance degradation; loads exceeding 20 pF reduce bandwidth and increase settling time, while loads above 100 pF risk instability and oscillation. To maintain specified 100 ns settling and 375 V/µs slew rate, keep trace capacitance, ADC input capacitance, and probe loading below 20 pF-or add a small series resistor (e.g., 10–50 Ω) between output and load to isolate capacitance, as recommended in the Capacitive Load Driving Ability section.
AD842JRZ-16 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 16-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Amplifier Type:
- General Purpose
- Number of Circuits:
- 1
- Output Type:
- -
- Slew Rate:
- 375V/µs
- Gain Bandwidth Product:
- 80 MHz
- -3db Bandwidth:
- -
- Current - Input Bias:
- 4.2 µA
- Voltage - Input Offset:
- 500 µV
- Current - Supply:
- 14mA
- Current - Output / Channel:
- 100 mA
- Voltage - Supply Span (Min):
- 10 V
- Voltage - Supply Span (Max):
- 36 V
- Operating Temperature:
- 0°C ~ 75°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 16-SOIC
AD842JRZ-16 FAQ
1.How can I place an order for AD842JRZ-16 through Aetrix?
Please submit a Request for Quotation (RFQ) for AD842JRZ-16 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD842JRZ-16 reliable?
The price and inventory of AD842JRZ-16 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD842JRZ-16 is usually 5 days.
3.What payment methods are accepted for AD842JRZ-16?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD842JRZ-16 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD842JRZ-16?
AD842JRZ-16 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD842JRZ-16 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD842JRZ-16?
For technical support, including AD842JRZ-16 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD842JRZ-16 requirements.
6.How does Aetrix verify that AD842JRZ-16 is sourced from the original manufacturer or authorized distributors?
All AD842JRZ-16 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD842JRZ-16 meets industry standards.
7.What is the process for return or replacement of AD842JRZ-16?
All AD842JRZ-16 units undergo pre-shipment inspection (PSI). If there is an issue with AD842JRZ-16, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD842JRZ-16 part is unused and in its original packaging.
Return procedure for AD842JRZ-16:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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