My Inquiry
My Account
Analog Devices Inc. AD9059BRSZ
- Part No.:
- AD9059BRSZ
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
AD9059BRSZ.pdf
- Description:
- IC ADC 8BIT FLASH 28SSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,160
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD9059BRSZ from Analog Devices is a dual 8-bit, 60 MSPS analog-to-digital converter with on-chip 2.5 V reference, 120 MHz analog bandwidth, and single 5 V supply operation-designed for RGB video digitization, QAM demodulators, and medical imaging systems requiring simultaneous sampling of two analog signals.
For engineers reviewing the AD9059BRSZ datasheet, AD9059BRSZ pinout, AD9059BRSZ application, or AD9059BRSZ equivalent, this page delivers verified technical context, real-world timing behavior (aperture delay = 2.7 ns), dynamic performance at 76 MHz input (SINAD = 43.5 dB), and validated alternatives for dual-channel 8-bit ADC selection in high-speed data acquisition.
Technical Context
The AD9059BRSZ integrates two independent flash-based ADC channels sharing a single TTL/CMOS-compatible ENCODE input, enabling simultaneous sampling on the rising edge with three-pipeline-stage MagAmp/Flash architecture. It features dual track-and-hold circuits, internal 2.5 V bandgap reference (±10 ppm/°C), and offset binary coding.
All digital outputs (D0A–D7A and D0B–D7B) are CMOS-compatible and configurable for 3 V or 5 V logic levels via separate VDD pins; power-down mode (PWRDN = HIGH) reduces dissipation to <12 mW while maintaining reference bias and driving outputs to high-impedance state.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 8 bits - defines quantization step size of ~3.9 mV over 1 Vp-p full-scale range |
| Sampling Rate | 60 MSPS maximum - supports pixel clocking up to 60 MHz in RGB video digitizers |
| Analog Bandwidth | 120 MHz typical - enables accurate digitization of IF signals up to 76 MHz (SINAD = 43.5 dB) |
| Power Dissipation | 400 mW typical at 60 MSPS - low enough for dense PCB layouts without forced air cooling |
| Aperture Uncertainty | 5 ps rms - limits SNR degradation at high input frequencies (e.g., 76 MHz) |
| Channel Matching | Gain delta ±1% FS, offset delta ±4 mV - ensures consistent I/Q signal pair fidelity in demodulator applications |
| Reference Voltage | 2.5 V ±0.1 V - internally generated, stable enough to eliminate external reference in cost-sensitive designs |
Pinout & Package
AD9059BRSZ is housed in a 28-lead shrink small outline package (SSOP, RS-28), 10.5 mm × 5.6 mm footprint, 1.75 mm height, JEDEC MO-150AH compliant, rated for –40°C to +85°C industrial operation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1, 28 | AINA, AINB | High-impedance (150 kΩ) single-ended analog inputs for Channel A and B; accept 1 Vp-p centered at 2.5 V |
| 2 | VREF | 2.5 V internal reference output; can be bypassed (0.1 µF) or overdriven externally for ±10% gain adjustment |
| 3 | PWRDN | Active-HIGH power-down control; places all digital outputs in high-impedance state and reduces total power to <12 mW |
| 4, 25 | VD | Analog 5 V supply; powers core ADC circuitry, track-and-hold, and reference - must be decoupled locally |
| 5, 24, 27 | GND | Dedicated ground connections; require low-inductance layout to minimize noise coupling between analog and digital sections |
| 6, 23 | VDD | Digital output supply (3 V or 5 V); isolated from VD to prevent digital switching noise from modulating analog conversion |
| 7–14 | D7A–D0A | Parallel 8-bit offset binary outputs for Channel A; MSB-first, valid 4.0–6.6 ns after ENCODE rising edge |
| 15–22 | D7B–D0B | Parallel 8-bit offset binary outputs for Channel B; identical timing and loading specs as Channel A outputs |
| 26 | ENCODE | TTL/CMOS-compatible clock input; rising edge triggers simultaneous sampling on both channels |
Key Features
| Feature | Design Value |
|---|---|
| Dual synchronized ADCs | Single ENCODE input controls both channels simultaneously - eliminates inter-channel skew in I/Q receivers |
| Integrated 2.5 V reference | Eliminates need for external precision reference IC or resistor divider network in most applications |
| Configurable digital interface | VDD pin accepts 3 V or 5 V - enables direct connection to FPGA I/O banks or microcontroller ports without level shifters |
| Low-power power-down mode | Reduces system idle power by >97% (from 400 mW to <12 mW) while preserving reference stability for fast wake-up |
| On-chip track-and-hold | Supports full 120 MHz analog bandwidth without external THA - simplifies front-end design for IF sampling |
Applications
| RGB Video Digitization | QAM Demodulation |
|---|---|
Use Scenario: Capturing red, green, and blue analog video signals at 60 MSPS for real-time display processing in broadcast monitors and medical endoscopy systems. IC Role / Device Role / Timing Role: Dual ADC performs parallel digitization of two color channels (e.g., R+G or Y+C) with matched gain/offset to preserve chroma fidelity. Use Value: 120 MHz analog bandwidth ensures <1 LSB settling error across pixel transitions; channel matching (<±1% gain delta) prevents color fringing. |
Use Scenario: Direct IF sampling in cable/satellite modem receivers where I and Q baseband signals are derived from quadrature downconversion. IC Role / Device Role / Timing Role: Simultaneous sampling of I and Q paths using shared ENCODE clock eliminates phase misalignment between channels. Use Value: Aperture uncertainty of 5 ps rms maintains EVM integrity at 64-QAM; crosstalk rejection >50 dBc prevents I/Q leakage-induced constellation distortion. |
| Digital Data Storage Read Channels | Medical Imaging Signal Acquisition |
Use Scenario: Converting analog playback waveforms from magnetic tape or optical disc read heads into digital streams for error correction and decoding. IC Role / Device Role / Timing Role: High SNR (46 dB at 10.3 MHz) and low harmonic distortion enable reliable recovery of encoded data patterns under noisy conditions. Use Value: 60 MSPS rate supports oversampling of NRZ data streams; power-down mode allows burst-mode operation to reduce thermal load during idle intervals. |
Use Scenario: Digitizing ultrasound echo return signals or MRI gradient coil feedback in portable diagnostic equipment with strict power and size constraints. IC Role / Device Role / Timing Role: Dual-channel architecture captures differential transducer pairs or time-multiplexed beamformed data with minimal latency. Use Value: Single 5 V supply and integrated reference reduce BOM count by ≥3 components; industrial temp range (–40°C to +85°C) supports field-deployable units. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar dual-channel 8-bit ADC applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9057BRSZ | Single-channel 8-bit, 60 MSPS ADC; same core architecture and pinout subset but lacks second channel and associated pins (D0B–D7B, AINB) | Used where only one analog path requires digitization - not suitable for I/Q or stereo applications | Select AD9057BRSZ when board space or cost must be minimized and dual-channel capability is unnecessary |
| MAX1186EEE+ | Dual 8-bit, 40 MSPS ADC; lower max sample rate, no integrated reference, requires external 2.5 V reference and separate power supplies for analog/digital sections | Suitable for lower-bandwidth instrumentation where 60 MSPS is not required and external reference is acceptable | Choose MAX1186EEE+ only if encode rate ≤40 MSPS suffices and design already includes precision reference infrastructure |
Compared with AD9059BRSZ, AD9057BRSZ reduces channel count and package I/O but sacrifices simultaneous dual-path capture, while MAX1186EEE+ trades sampling speed and integration for broader supply flexibility and legacy compatibility - neither offers drop-in replacement capability.
Availability
AD9059BRSZ is available at Aetrix Electronics and suitable for RGB video digitization, QAM demodulator design, and medical imaging signal acquisition requiring stable component supply across extended production lifecycles.
Supply support for AD9059BRSZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with design centers and manufacturing facilities worldwide.
The AD9059BRSZ belongs to Analog Devices' high-speed data converter product line, engineered specifically for cost-sensitive, space-constrained applications demanding dual-channel synchronization, low power, and integrated reference functionality - notably in communications and imaging systems.
FAQ
What is the absolute maximum analog input voltage for the AD9059BRSZ?
The AD9059BRSZ specifies an absolute maximum analog input voltage range of –0.5 V to VD + 0.5 V. With VD = 5 V, this translates to –0.5 V to +5.5 V. Exceeding these limits risks permanent damage. The recommended operating range is 1 Vp-p centered at 2.5 V (i.e., 2.0 V to 3.0 V), as confirmed in the Functional Description and Electrical Characteristics tables of the AD9059BRSZ datasheet.
Does the AD9059BRSZ support independent power-down of each ADC channel?
No, the AD9059BRSZ does not support independent channel power-down. Its PWRDN pin (Pin 3) globally disables both ADC A and ADC B simultaneously, placing all digital outputs (D0A–D7A and D0B–D7B) into high-impedance state and reducing total power to <12 mW. This behavior is explicitly stated in the Product Description and Using the AD9059 section: "Both ADC channels are controlled simultaneously by the PWRDN pin; they cannot be shut down or turned on independently."
Can the AD9059BRSZ operate with a 3 V analog supply (VD)?
No, the AD9059BRSZ requires a 5 V analog supply on the VD pin (Pins 4 and 25). The Absolute Maximum Ratings specify VD up to 7 V, and all electrical specifications-including power dissipation, dynamic performance, and analog bandwidth-are characterized at VD = 5 V. The datasheet contains no test data or operational guidance for VD < 4.5 V, and attempting 3 V operation would violate the specified operating conditions for the AD9059BRSZ.
What is the guaranteed minimum ENCODE pulsewidth for reliable operation of the AD9059BRSZ?
The AD9059BRSZ guarantees reliable operation with a minimum ENCODE pulsewidth high (tEH) and low (tEL) of 6.7 ns each, as specified in the Switching Performance table under Test Level IV (guaranteed by design and characterization). This value is confirmed across the full industrial temperature range (–40°C to +85°C) and forms the basis for timing margin calculations in PCB layout and clock driver selection for the AD9059BRSZ.
Is the AD9059BRSZ pin-compatible with the AD9059/PCB evaluation board?
Yes, the AD9059BRSZ is pin-compatible with the AD9059/PCB evaluation board. The board schematic (Figure 7) explicitly labels U1 as "AD9059RS", matching the RS-28 package designation used for AD9059BRSZ. Pin numbering, functions (e.g., AINA=Pin1, AINB=Pin28, ENCODE=Pin26), and power/ground assignments align exactly with the AD9059BRSZ pin configuration diagram and functional description - enabling direct socket replacement without hardware modification.
AD9059BRSZ Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Number of Bits:
- 8
- Sampling Rate (Per Second):
- 60M
- Number of Inputs:
- 2
- Input Type:
- Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 2
- Architecture:
- Flash
- Reference Type:
- Internal
- Voltage - Supply, Analog:
- 5V
- Voltage - Supply, Digital:
- 3V ~ 5V
- Features:
- Simultaneous Sampling
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD9059BRSZ FAQ
1.How can I place an order for AD9059BRSZ through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9059BRSZ on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9059BRSZ reliable?
The price and inventory of AD9059BRSZ are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9059BRSZ is usually 5 days.
3.What payment methods are accepted for AD9059BRSZ?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9059BRSZ transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9059BRSZ?
AD9059BRSZ orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9059BRSZ order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9059BRSZ?
For technical support, including AD9059BRSZ datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9059BRSZ requirements.
6.How does Aetrix verify that AD9059BRSZ is sourced from the original manufacturer or authorized distributors?
All AD9059BRSZ products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9059BRSZ meets industry standards.
7.What is the process for return or replacement of AD9059BRSZ?
All AD9059BRSZ units undergo pre-shipment inspection (PSI). If there is an issue with AD9059BRSZ, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9059BRSZ part is unused and in its original packaging.
Return procedure for AD9059BRSZ:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD9059BRSZ Tags
-
ADC081C021CIMKX/NOPB
Texas Instruments
-
MCP3021A5T-E/OT
Microchip Technology
-
TLA2024IRUGR
Texas Instruments
-
MCP3221A5T-E/OT
Microchip Technology
-
MCP3221A5T-I/OT
Microchip Technology
-
MCP3221A4T-E/OT
Microchip Technology
-
MCP3221A6T-E/OT
Microchip Technology
-
MCP3221A0T-E/OT
Microchip Technology
-
MCP3221A1T-E/OT
Microchip Technology
-
ADC121S021CIMFX/NOPB
Texas Instruments
-
MCP3001-I/MS
Microchip Technology
-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…
