Analog Devices Inc. AD9060JZ

Overview

AD9060JZ from Analog Devices is a monolithic 10-bit, 75 MSPS flash analog-to-digital converter with ECL-compatible outputs, bipolar ±1.75 V analog input range, 57 dB SNR at 2.3 MHz, and 45 pF input capacitance - deployed in high-speed digital oscilloscopes and radar warning systems.

For engineers reviewing the AD9060JZ datasheet, AD9060JZ pinout, AD9060JZ application, or AD9060JZ equivalent, this page delivers verified technical context, exact package mapping (Z-68D ceramic leaded chip carrier), confirmed ECL timing behavior, and validated alternatives for wideband receiver and professional video digitization designs.

Technical Context

The AD9060JZ uses a modified flash architecture with 512 comparators and an interpolation scheme for the LSB, reducing input capacitance versus full 1024-comparator designs while maintaining linearity. It employs voltage sense lines (+VSENSE/–VSENSE) and quarter-point reference taps (1/4REF, 1/2REF, 3/4REF) to correct ladder offset errors.

Conversion is triggered on the rising edge of differential ECL ENCODE/ENCODE signals; aperture uncertainty is 5 ps rms, and output delay ranges from 2–9 ns. The overflow bit indicates AIN > +VSENSE, independent of D0–D9 data integrity.

Key Specifications

Pinout & Package

The AD9060JZ is housed in a 68-lead ceramic leaded chip carrier (CLCC) package, designated Z-68D, optimized for low thermal impedance (θJC = 1°C/W) and high-speed ECL signal routing.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar high-speed ADC applications.

Compared with AD9060JZ, AD9050JN trades resolution and speed for lower power and cost in non-critical applications, while AD9051BRS offers modern LVDS interfacing and integration at the expense of SNR and absolute timing precision.

Availability

AD9060JZ is available at Aetrix Electronics and suitable for digital oscilloscopes, radar warning systems, and professional video equipment requiring stable component supply across extended production lifecycles.

Supply support for AD9060JZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global semiconductor company headquartered in Norwood, MA, specializing in high-performance analog, mixed-signal, and digital signal processing technologies.

The AD9060JZ belongs to Analog Devices' high-speed flash ADC product line, engineered for wideband receiver, instrumentation, and imaging applications demanding >70 MSPS sampling with verified ac performance at elevated input frequencies.

FAQ

What is the operating temperature range of the AD9060JZ?

The AD9060JZ is rated for operation from 0°C to +70°C. This commercial-grade temperature specification is explicitly defined in the Ordering Guide and confirmed in the Absolute Maximum Ratings table. The AD9060JZ is distinct from the AD9060KZ, which shares the same temperature range but differs in test level coverage. Thermal performance is characterized with θJC = 1°C/W for the Z-68D package, enabling reliable operation within this ambient envelope when properly heatsinked.

Does the AD9060JZ require external voltage references?

Yes, the AD9060JZ requires externally supplied +VREF and –VREF voltages to set its ±1.75 V analog input range. These are force connections applied across the internal 37 Ω resistor ladder. Additionally, the 1/4REF, 1/2REF, and 3/4REF taps must be driven at precise voltages (–0.875 V, 0 V, +0.875 V) to achieve specified linearity and ac performance. The +VSENSE and –VSENSE sense lines enable closed-loop correction of ladder endpoint offsets, and their use is mandatory for guaranteed specifications.

What logic family drives the ENCODE inputs of the AD9060JZ?

The ENCODE and ENCODE inputs of the AD9060JZ are ECL-compatible and must be driven differentially with clean, fast edges. Logic 1 voltage is –1.1 V and Logic 0 is –1.5 V, with input capacitance of 5 pF. The recommended interface uses a differential ECL clock source terminated close to the AD9060JZ package; single-ended drive is possible only with a high-speed comparator like the AD96685 or by biasing ENCODE at 1.3 V and driving ENCODE directly - though this degrades jitter performance.

How is the output data format controlled on the AD9060JZ?

The AD9060JZ output data format (binary, inverted binary, twos complement, or inverted twos complement) is selected using two dc control pins: MSB INVERT (Pin 61) and LSBs INVERT (Pin 59). Both pins are referenced to GND or +VS; grounding both yields standard offset binary. The truth table in the datasheet defines all four combinations, and the selection is static - no dynamic reconfiguration is supported during conversion. Output polarity is independent of the overflow bit behavior.

Is the OVERFLOW output of the AD9060JZ production-tested for timing accuracy?

No, the OVERFLOW output timing and transition voltage accuracy are not production-tested and are excluded from linearity specifications. The datasheet explicitly states: "Accuracy of the overflow comparator is not tested and not included in linearity specifications." Its assertion depends on circuit layout, encode slew rate, and local noise; it is intended only as a coarse out-of-range indicator and should not be used for precise analog voltage measurement or critical timing decisions in the system.