Analog Devices Inc. AD9152-FMC-EBZ

Overview

AD9152-FMC-EBZ from Analog Devices is an evaluation board for the AD9152 dual 16-bit 2.25 GSPS TxDAC+ digital-to-analog converter, designed to accelerate RF signal chain prototyping in wideband wireless transmitters. It supports JESD204B Subclass 1 interface at up to 12.38 Gbps per lane, delivers SFDR ≥72 dBc at 150 MHz IF, and enables deterministic latency synchronization with SYSREF for MIMO and phased-array applications.

For engineers reviewing the AD9152-FMC-EBZ datasheet, AD9152-FMC-EBZ pinout, AD9152-FMC-EBZ application, or AD9152-FMC-EBZ equivalent, this page provides verified hardware integration details, FMC-LPC compatibility notes, FPGA interface timing constraints, and direct linkage to the AD9152 DAC's interpolation, inverse sinc, and programmable FIR filter capabilities.

Technical Context

The AD9152-FMC-EBZ implements a full reference design for the AD9152 DAC, featuring four CML SERDIN inputs (SERDIN0± to SERDIN3±), dual differential DAC outputs (IOUT±/QOUT±), and synchronized clocking via DACCLK± and REFCLK±. It integrates on-board power regulation for AVDD33, DVDD12, CVDD12, SVDD12, and PLLVDD12 rails, with precise 1.2 V termination (VTT) and thermal management via exposed-pad LFCSP mounting.

Board-level features include SPI interface access (CS/SCLK/SDIO/SDO), interrupt and reset signaling (IRQ/RESET), transmit enable (TXEN), and protection circuitry (PROTECT_OUT). The design supports fixed-latency operation, JESD204B link initialization, and calibration of local multiframe clock (LMFC) delay - all validated per AD9152 Rev. B specifications.

Key Specifications

Availability

AD9152-FMC-EBZ is available at Aetrix Electronics and suitable for wireless infrastructure development, software-defined radio prototyping, and microwave point-to-point radio design requiring stable component supply, traceable sourcing, and long-term lifecycle support.

Supply support for AD9152-FMC-EBZ includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA, with R&D centers worldwide and ISO 9001-certified manufacturing.

The AD9152-FMC-EBZ belongs to Analog Devices' TxDAC+® family evaluation platform line, engineered specifically to validate high-speed DAC performance in 5G, LTE-A, and broadband instrumentation signal chains.

FAQ

What is the primary function of the AD9152-FMC-EBZ?

The AD9152-FMC-EBZ is an FMC-compatible evaluation board for the AD9152 dual 16-bit 2.25 GSPS DAC. It provides complete hardware implementation-including power, clocking, JESD204B interface, and analog output conditioning-to enable rapid validation of wideband transmit signal chains in wireless base stations and SDR systems. The AD9152-FMC-EBZ allows engineers to characterize the AD9152's SFDR, ACLR, and deterministic latency without custom PCB design.

Does the AD9152-FMC-EBZ support JESD204B Subclass 1 synchronization?

Yes, the AD9152-FMC-EBZ fully supports JESD204B Subclass 1 operation as required by the AD9152. It routes SYSREF± differentially to the DAC with matched trace lengths and configurable termination, enabling deterministic latency alignment across multiple AD9152 devices. The board validates LMFC delay calibration and multichip sync per AD9152 Rev. B timing specifications (Table 5, Table 7).

What FPGA platforms is the AD9152-FMC-EBZ compatible with?

The AD9152-FMC-EBZ complies with ANSI/VITA 57.1 FMC-LPC standards and is verified with Xilinx Kintex-7 and Virtex-7 FPGA carrier cards. Its 8 GTX transceivers map directly to JESD204B lanes (SERDIN0±–SERDIN3±), while LVCMOS I/O supports SPI control, TXEN, IRQ, and RESET signals. Carrier card must provide 12.38 Gbps/lane SERDES capability and SYSREF distribution.

Can the AD9152-FMC-EBZ operate without an external PLL?

Yes - the AD9152-FMC-EBZ supports both PLL-on and PLL-off configurations. When using the AD9152's internal PLL (enabled via REFCLK± input), the board conditions and distributes the 70–1000 MHz reference clock with proper AC coupling and termination. Alternatively, a clean external DACCLK± source (up to 2250 MHz) can bypass the PLL, and the AD9152-FMC-EBZ provides direct routing and impedance matching for that path.

What output interface does the AD9152-FMC-EBZ provide for the DAC analog signals?

The AD9152-FMC-EBZ delivers the AD9152's differential current-output signals (IOUT± and QOUT±) through 50 Ω matched microstrip traces to SMA connectors, with onboard 4 kΩ load resistors and optional AC coupling. Output compliance range is 2.3–3.47 V, supporting direct connection to quadrature modulators like the ADRF6720, as specified in the AD9152 datasheet (Table 1, General Description).