Analog Devices Inc. AD9200ARS

Overview

AD9200ARS from Analog Devices is a monolithic 10-bit, 20 MSPS CMOS analog-to-digital converter with on-chip sample-and-hold amplifier, built-in clamp circuit, and programmable internal voltage reference. It operates from 2.7 V to 5.5 V, delivers 80 mW power dissipation at 3 V, and guarantees no missing codes across –40°C to +85°C. It is used in video signal digitization where DC restoration of AC-coupled inputs is required.

For engineers reviewing the AD9200ARS datasheet, AD9200ARS pinout, AD9200ARS application, or AD9200ARS equivalent, this page provides verified technical context, exact pin functions for SSOP-28 package, confirmed clamp performance specs (±20 mV clamp error), real-world video and communications use cases, and two validated alternative parts with documented functional and application differences.

Technical Context

The AD9200ARS implements a multistage differential pipeline architecture enabling 20 MSPS conversion with guaranteed no-missing-codes performance over industrial temperature range. Its sample-and-hold supports both single-ended and differential input configurations, with configurable reference modes (1 V or 2 V internal, external, or center-span).

Clamp functionality is hardware-enabled via dedicated CLAMP and CLAMPIN pins and is exclusive to AD9200ARS and AD9200KST variants. Clamp error is specified as ±20 mV (typ) with 2 µs pulsewidth, supporting DC restoration of video signals without external circuitry.

Key Specifications

Pinout & Package

AD9200ARS is housed in a 28-lead Shrink Small Outline Package (SSOP, RS-28), rated for –40°C to +85°C operation. Pin pitch is 0.65 mm; body dimensions are 10.2 mm × 5.3 mm × 1.95 mm.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar ADC applications.

Compared with AD9200JRS, AD9200ARS adds industrial temperature qualification without altering interface or performance-ideal for embedded systems in harsh environments. Compared with AD9203ARU, AD9200ARS trades 20 MSPS maximum rate for integrated clamp and proven video-linearity specs, reducing design risk in broadcast and surveillance applications.

Availability

AD9200ARS is available at Aetrix Electronics and suitable for video digitization, IF sampling, portable test equipment, and industrial imaging applications requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for AD9200ARS includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.

The AD9200 product line delivers low-power, high-speed ADCs optimized for video, communications, and instrumentation-designed to replace discrete sample-and-hold + flash ADC solutions with monolithic, pin-compatible alternatives.

FAQ

What is the purpose of the CLAMP and CLAMPIN pins on the AD9200ARS?

The CLAMP pin enables the internal clamp switch, while CLAMPIN sets the DC reference level to which the AIN signal is restored. When CLAMP is asserted high, the AD9200ARS servo-locks AIN to the CLAMPIN voltage (0.5 V–2.7 V range). This function is exclusive to AD9200ARS and AD9200KST variants and is essential for AC-coupled video digitization. The AD9200ARS clamp error is ±20 mV (typ), ensuring stable black-level reproduction in NTSC/PAL systems.

Does the AD9200ARS support differential input operation?

Yes, the AD9200ARS supports differential input by shorting REFTS and REFBS together and driving them as the second input node, with MODE tied to AVDD/2. In this configuration, the input span becomes ±VREF/2 around the midscale point. Differential mode delivers superior distortion performance (SFDR –69 dB typ at 3.58 MHz) compared to single-ended operation, making it preferred for high-fidelity communications sampling. The AD9200ARS maintains full 10-bit resolution and no-missing-codes guarantee in differential mode.

How does the AD9200ARS achieve low power consumption at 20 MSPS?

The AD9200ARS achieves 80 mW at 3 V through a multistage CMOS pipeline architecture that distributes conversion tasks across smaller sub-blocks, reducing comparator count and dynamic switching. Power drops to <4 mW in standby mode when STBY is high and CLK is low. The AD9200ARS also minimizes I/O driver loading via three-state outputs and uses optimized internal biasing-enabling portable and thermally constrained designs without sacrificing 20 MSPS throughput.

Can the AD9200ARS operate with a 5 V supply?

Yes, the AD9200ARS supports AVDD and DRVDD supplies from 2.7 V to 5.5 V. At 5 V, power consumption increases to ~100 mW (typ), and digital output VOH/VOL levels shift accordingly (e.g., VOH = +4.5 V at IOH = 50 µA). All AC and DC specifications-including DNL (±0.5 LSB), INL (±0.75 LSB), and SINAD (54 dB at 10 MHz)-remain valid across the full supply range. The AD9200ARS maintains pin compatibility and functional behavior regardless of supply voltage within spec.

Is the AD9200ARS pin-compatible with the AD876?

Yes, the AD9200ARS is pin-compatible with the AD876 in SSOP-28 package, allowing drop-in replacement in legacy designs. Both share identical pin numbering, signal names, and basic interface timing. However, the AD9200ARS adds clamp functionality (CLAMP/CLAMPIN pins), a wider supply range (2.7–5.5 V vs. 5 V only), and lower power (80 mW vs. ~150 mW). To retain AD876 compatibility, configure MODE = AVSS and disable clamp; the AD9200ARS will behave identically in all other respects.