Analog Devices Inc. AD9200ARSZRL
- Part No.:
- AD9200ARSZRL
- Manufacturer:
- Analog Devices Inc.
- Category:
- Analog to Digital Converters (ADC)
- Package:
- 28-SSOP (0.209", 5.30mm Width)
- Datasheet:
-
AD9200ARSZRL.pdf
- Description:
- IC ADC 10BIT PIPELINED 28SSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,300
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AD9200ARSZRL from Analog Devices is a monolithic 10-bit, 20 MSPS CMOS analog-to-digital converter with integrated sample-and-hold amplifier and programmable on-chip voltage reference. It operates from 2.7 V to 5.5 V, delivers 80 mW power dissipation at 3 V, achieves ±0.5 LSB differential nonlinearity, and supports IF undersampling up to 135 MHz - used in high-speed communications receivers and video digitization systems.
For engineers reviewing the AD9200ARSZRL datasheet, AD9200ARSZRL pinout, AD9200ARSZRL application, or AD9200ARSZRL equivalent, key selection criteria include its 20 MSPS throughput, 300 MHz input bandwidth, built-in clamp function (enabled in ARS package), three-state digital outputs, and industrial temperature range (–40°C to +85°C).
Technical Context
The AD9200ARSZRL employs a multistage pipelined architecture enabling 20 MSPS conversion with guaranteed no missing codes across –40°C to +85°C. Its sample-and-hold supports both single-ended and differential inputs, with configurable input spans (1 V or 2 V p-p) via pin-strapped MODE and REFSENSE pins.
It integrates dual reference buffers (A1, A2), internal bandgap reference (1 V/2 V selectable), and a dedicated clamp circuit for DC restoration - active only in AD9200ARS and AD9200KST variants. The OTR output flags overflow conditions, and pipeline latency is fixed at 3 clock cycles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Resolution | 10-bit - defines quantization step size of ~1 mV for 1 V full-scale range, enabling precise amplitude discrimination in baseband signal capture. |
| Sampling Rate | 20 MSPS - supports Nyquist-limited input frequencies up to 10 MHz, or IF undersampling of signals up to 135 MHz with aliasing control. |
| Differential Nonlinearity | ±0.5 LSB (typ) - ensures monotonic transfer function and prevents code ambiguities critical for closed-loop control and measurement accuracy. |
| Input Bandwidth (–3 dB) | 300 MHz - allows faithful digitization of fast-rising video edges or wideband RF/IF signals without amplitude roll-off. |
| Power Dissipation | 80 mW at 3 V - enables integration into portable or thermally constrained systems without forced cooling or derating. |
| Supply Range | 2.7 V to 5.5 V - permits direct interfacing with 3.3 V or 5 V logic domains and simplifies mixed-supply system design. |
| Operating Temperature | –40°C to +85°C - qualified for industrial-grade deployment in outdoor infrastructure, factory automation, and embedded instrumentation. |
Pinout & Package
AD9200ARSZRL is housed in a 28-lead Shrink Small Outline Package (SSOP), RoHS-compliant, with 0.65 mm lead pitch and exposed paddle (thermal pad not electrically connected). Pin 1 identifier located at top-left corner; body dimensions 10.2 mm × 5.3 mm × 1.75 mm (max).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| AIN | Analog Input | Single-ended or differential input node; accepts 0.5 V to 2.5 V span with 1 pF switched capacitance and 4 ns aperture delay. |
| CLK | Master Clock Input | Controls all internal sampling and pipeline stages; requires ≥22.5 ns high/low pulsewidth and drives 3-cycle latency timing. |
| D0–D9 | Digital Output Bus | CMOS-compatible straight-binary outputs (D0 = LSB, D9 = MSB); three-state enabled by THREE-STATE pin. |
| OTR | Out-of-Range Indicator | Active-high flag signaling input overflow beyond REFTS/REFBS bounds; used with MSB for signed overflow detection. |
| STBY | Standby Control | High-level assertion places ADC in sleep mode (<4 mW), with 400 ns wake-up time; internal pull-down if unconnected. |
| CLAMP / CLAMPIN | DC Restoration Interface | CLAMP enables internal switch; CLAMPIN sets clamped DC level (0.5 V–2.7 V range) - functional only in AD9200ARS variant. |
| REFTS / REFBS | Reference Sense Inputs | Define analog input range endpoints; decoupled externally via REFTF/REFBF capacitors per Figure 17. |
| REFSENSE / MODE | Reference & Input Configuration | REFSENSE selects 1 V/2 V/internal disable; MODE configures top/bottom, center-span, or differential input topology. |
Key Features
| Feature | Design Value |
|---|---|
| Built-in Clamp Function | Enables DC restoration of AC-coupled video signals (e.g., NTSC/PAL) without external op-amps - available only in AD9200ARS and AD9200KST packages. |
| Adjustable On-Chip Voltage Reference | 1 V or 2 V output selectable via REFSENSE pin strapping; supports external reference injection for enhanced drift/accuracy requirements. |
| Three-State Digital Outputs | Allows direct connection to shared data buses; controlled by THREE-STATE pin - eliminates need for external bus transceivers. |
| Low-Power Sleep Mode | Reduces power to <4 mW during idle periods while retaining configuration state - critical for battery-powered or duty-cycled systems. |
| IF Undersampling Capability | 300 MHz input bandwidth and low jitter (2 ps aperture uncertainty) support Nyquist-exceeding RF/IF sampling with minimal aliasing distortion. |
Applications
| Communications Receiver | Video Digitization |
|---|---|
Use Scenario: Digitizing intermediate frequency (IF) signals in cellular base station front-ends or software-defined radios. IC Role / Device Role / Timing Role: ADC core capturing 45–90 MHz IF bands with 20 MSPS rate and 300 MHz bandwidth to preserve signal integrity. Use Value: Enables direct IF sampling without downconversion, reducing component count and phase noise in multi-carrier systems. |
Use Scenario: Converting composite video (NTSC/PAL) or RGB signals in broadcast equipment and medical imaging displays. IC Role / Device Role / Timing Role: High-fidelity digitizer with clamp circuit restoring DC level of AC-coupled video sync pulses. Use Value: Eliminates external clamping op-amps and associated layout complexity while meeting NTSC differential gain/phase specs (0.05%/0.1°). |
| Industrial Data Acquisition | Test & Measurement Instrumentation |
Use Scenario: High-speed waveform capture in oscilloscopes, power quality analyzers, and motor drive feedback loops. IC Role / Device Role / Timing Role: Precision ADC providing 10-bit resolution and ±0.5 LSB DNL for accurate transient event capture. Use Value: Guarantees no missing codes over industrial temperature range, ensuring reliable fault detection in safety-critical systems. |
Use Scenario: Signal analysis in spectrum analyzers and arbitrary waveform generators requiring clean spectral performance. IC Role / Device Role / Timing Role: Digitizer delivering 54.5 dB SINAD at 3.58 MHz and –61 dBc SFDR for low-noise, low-distortion measurements. Use Value: Supports high dynamic range testing without external dithering or calibration overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar analog-to-digital conversion applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AD9203ARTZ-REEL7 | 10-bit, 40 MSPS, 100 mW; no clamp; 32-lead TSSOP; higher speed but no DC restoration. | Suitable for higher-rate IF sampling where clamp is unnecessary; lacks industrial temp grade (only –40°C to +85°C with derating). | Select when >20 MSPS throughput is required and external clamping is acceptable. |
| ADS8325IPW | 16-bit, 100 kSPS, 25 mW; SAR architecture; SPI interface; no OTR or clamp; 20-lead TSSOP. | Targets precision DC/low-frequency acquisition (e.g., sensor interfaces), not high-speed streaming. | Choose for high-resolution, low-power measurement where speed is secondary to accuracy. |
Compared with AD9200ARSZRL, AD9203ARTZ-REEL7 offers double the sampling rate but omits the clamp and industrial qualification, while ADS8325IPW trades speed for 6-bit higher resolution and serial interface - making AD9200ARSZRL optimal for cost-sensitive, medium-speed video/communications designs needing integrated DC restoration.
Availability
AD9200ARSZRL is available at Aetrix Electronics and suitable for communications receivers, video digitization systems, and industrial data acquisition requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AD9200ARSZRL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Analog Devices, Inc. is a global leader in high-performance analog, mixed-signal, and digital signal processing semiconductors, headquartered in Norwood, MA.
The AD9200 product line delivers low-power, medium-speed ADCs optimized for communications infrastructure, video processing, and industrial instrumentation - emphasizing integration, flexibility, and robustness in harsh environments.
FAQ
What is the operating temperature range for AD9200ARSZRL?
The AD9200ARSZRL is specified for industrial operation from –40°C to +85°C. This rating applies to the full set of DC accuracy, dynamic performance, and functional specifications - including DNL, INL, SINAD, and clamp functionality - without derating. It is validated per Analog Devices' industrial qualification standards and is suitable for deployment in factory automation, outdoor telecom equipment, and embedded test instruments.
Does AD9200ARSZRL support differential input operation?
Yes, AD9200ARSZRL supports true differential input operation by shorting REFTS and REFBS together and driving them as the second input node, with MODE tied to AVDD/2. In this configuration, the input span becomes ±VREF/2 around the common-mode voltage, delivering optimal distortion performance (e.g., improved SFDR and THD) compared to single-ended use - confirmed in the AD9200 datasheet Figure 29 and Table I.
Is the clamp function available on AD9200ARSZRL?
Yes, the clamp function is fully supported on AD9200ARSZRL, as it belongs to the AD9200ARS family variant explicitly noted in the datasheet (pages 2, 13) as featuring "Built-In Clamp Function (DC Restore)". CLAMP and CLAMPIN pins are functional, and the clamp error is specified at ±20 mV (typ) for input levels between 0.5 V and 2.7 V with 10 Ω source impedance.
What reference configurations does AD9200ARSZRL support?
AD9200ARSZRL supports four reference modes: (1) 1 V internal (REFSENSE = VREF), (2) 2 V internal (REFSENSE = GND), (3) external reference applied to REFTS/REFBS/VREF, and (4) variable internal reference (1–2 V) using external resistor divider on REFSENSE. All modes are selected via pin strapping per Table I in the datasheet - no register programming required.
Can AD9200ARSZRL be used with a 5 V supply?
Yes, AD9200ARSZRL operates across 2.7 V to 5.5 V on both AVDD and DRVDD supplies. At 5 V, typical power consumption rises to ~100 mW (per datasheet Table, "Power Consumption" row), and digital output VOH/VOL values shift accordingly (e.g., VOH = +4.5 V at IOH = 50 µA). All AC/DC specifications remain valid, and the 5 V supply enables direct interfacing with legacy 5 V logic families.
AD9200ARSZRL Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Analog Devices Inc.
- Series:
- -
- Package/Case:
- 28-SSOP (0.209", 5.30mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Number of Bits:
- 10
- Sampling Rate (Per Second):
- 20M
- Number of Inputs:
- 1
- Input Type:
- Differential, Single Ended
- Data Interface:
- Parallel
- Configuration:
- S/H-ADC
- Ratio - S/H:ADC:
- 1:1
- Number of A/D Converters:
- 1
- Architecture:
- Pipelined
- Reference Type:
- External, Internal
- Voltage - Supply, Analog:
- 2.7V ~ 5.5V
- Voltage - Supply, Digital:
- 2.7V ~ 5.5V
- Features:
- -
- Operating Temperature:
- -40°C ~ 85°C
- Supplier Device Package:
- 28-SSOP
- Mounting Type:
- Surface Mount
- Grade:
- -
- Qualification:
- -
AD9200ARSZRL FAQ
1.How can I place an order for AD9200ARSZRL through Aetrix?
Please submit a Request for Quotation (RFQ) for AD9200ARSZRL on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AD9200ARSZRL reliable?
The price and inventory of AD9200ARSZRL are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AD9200ARSZRL is usually 5 days.
3.What payment methods are accepted for AD9200ARSZRL?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AD9200ARSZRL transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AD9200ARSZRL?
AD9200ARSZRL orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AD9200ARSZRL order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AD9200ARSZRL?
For technical support, including AD9200ARSZRL datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AD9200ARSZRL requirements.
6.How does Aetrix verify that AD9200ARSZRL is sourced from the original manufacturer or authorized distributors?
All AD9200ARSZRL products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AD9200ARSZRL meets industry standards.
7.What is the process for return or replacement of AD9200ARSZRL?
All AD9200ARSZRL units undergo pre-shipment inspection (PSI). If there is an issue with AD9200ARSZRL, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AD9200ARSZRL part is unused and in its original packaging.
Return procedure for AD9200ARSZRL:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AD9200ARSZRL Tags

-
ADC081C021CIMKX/NOPB
Texas Instruments

-
MCP3021A5T-E/OT
Microchip Technology

-
TLA2024IRUGR
Texas Instruments

-
MCP3221A5T-E/OT
Microchip Technology

-
MCP3221A5T-I/OT
Microchip Technology

-
MCP3221A4T-E/OT
Microchip Technology

-
MCP3221A6T-E/OT
Microchip Technology

-
MCP3221A0T-E/OT
Microchip Technology

-
MCP3221A1T-E/OT
Microchip Technology

-
ADC121S021CIMFX/NOPB
Texas Instruments

-
MCP3001-I/MS
Microchip Technology

-
MCP3001-I/SN
Microchip Technology
Tech Hub
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

